399 lines
11 KiB
C
399 lines
11 KiB
C
/* $NetBSD: plumicu.c,v 1.7 2002/10/02 05:26:46 thorpej Exp $ */
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/*-
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* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <hpcmips/tx/tx39var.h>
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#include <hpcmips/dev/plumvar.h>
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#include <hpcmips/dev/plumicuvar.h>
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#include <hpcmips/dev/plumicureg.h>
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#ifdef PLUMICUDEBUG
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#define DPRINTF(arg) printf arg
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#else
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#define DPRINTF(arg)
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#endif
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int plumicu_match(struct device *, struct cfdata *, void *);
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void plumicu_attach(struct device *, struct device *, void *);
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int plumicu_intr(void *);
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static __inline__ void plum_di(plum_chipset_tag_t);
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static __inline__ void plum_ei(plum_chipset_tag_t);
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const struct plum_intr_ctrl {
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plumreg_t ic_ackpat1;
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plumreg_t ic_ackpat2; int ic_ackreg2;
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plumreg_t ic_ienpat; int ic_ienreg;
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plumreg_t ic_senpat; int ic_senreg;
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} pi_ctrl[PLUM_INTR_MAX] = {
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[PLUM_INT_C1IO] = {PLUM_INT_INTSTA_PCCINT,
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PLUM_INT_PCCINTS_C1IO, PLUM_INT_PCCINTS_REG,
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PLUM_INT_PCCIEN_IENC1IO, PLUM_INT_PCCIEN_REG,
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PLUM_INT_PCCIEN_SENC1IO, PLUM_INT_PCCIEN_REG
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},
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[PLUM_INT_C1RI] = {PLUM_INT_INTSTA_PCCINT,
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PLUM_INT_PCCINTS_C1RI, PLUM_INT_PCCINTS_REG,
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PLUM_INT_PCCIEN_IENC1RI, PLUM_INT_PCCIEN_REG,
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PLUM_INT_PCCIEN_SENC1RI, PLUM_INT_PCCIEN_REG
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},
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[PLUM_INT_C1SC] = {PLUM_INT_INTSTA_C1SCINT, 0, 0, 0, 0, 0, 0},
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[PLUM_INT_C2IO] = {PLUM_INT_INTSTA_PCCINT,
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PLUM_INT_PCCINTS_C2IO, PLUM_INT_PCCINTS_REG,
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PLUM_INT_PCCIEN_IENC2IO, PLUM_INT_PCCIEN_REG,
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PLUM_INT_PCCIEN_SENC2IO, PLUM_INT_PCCIEN_REG
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},
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[PLUM_INT_C2RI] = {PLUM_INT_INTSTA_PCCINT,
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PLUM_INT_PCCINTS_C2RI, PLUM_INT_PCCINTS_REG,
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PLUM_INT_PCCIEN_IENC2RI, PLUM_INT_PCCIEN_REG,
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PLUM_INT_PCCIEN_SENC2RI, PLUM_INT_PCCIEN_REG
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},
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[PLUM_INT_C2SC] = {PLUM_INT_INTSTA_C2SCINT, 0, 0, 0, 0, 0, 0},
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[PLUM_INT_DISP] = {PLUM_INT_INTSTA_DISPINT, 0, 0, 0, 0, 0, 0},
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[PLUM_INT_USB] = {PLUM_INT_INTSTA_USBINT,
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0, 0,
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PLUM_INT_USBINTEN_IEN, PLUM_INT_USBINTEN_REG,
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0, 0
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},
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[PLUM_INT_USBWAKE] = {PLUM_INT_INTSTA_USBWAKE,
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0, 0,
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PLUM_INT_USBINTEN_WIEN, PLUM_INT_USBINTEN_REG,
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0, 0
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},
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[PLUM_INT_SM] = {PLUM_INT_INTSTA_SMINT,
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0, 0,
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PLUM_INT_SMIEN, PLUM_INT_SMIEN_REG,
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0, 0
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},
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[PLUM_INT_EXT5IO0] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO5INT0, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO5INT0, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO5INT0, PLUM_INT_EXTIEN_REG,
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},
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[PLUM_INT_EXT5IO1] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO5INT1, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO5INT1, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO5INT1, PLUM_INT_EXTIEN_REG,
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},
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[PLUM_INT_EXT5IO2] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO5INT2, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO5INT2, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO5INT2, PLUM_INT_EXTIEN_REG,
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},
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[PLUM_INT_EXT5IO3] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO5INT3, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO5INT0, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO5INT0, PLUM_INT_EXTIEN_REG,
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},
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[PLUM_INT_EXT3IO0] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO3INT0, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO3INT0, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO3INT0, PLUM_INT_EXTIEN_REG,
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},
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[PLUM_INT_EXT3IO1] = {PLUM_INT_INTSTA_EXTINT,
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PLUM_INT_EXTINTS_IO3INT1, PLUM_INT_EXTINTS_REG,
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PLUM_INT_EXTIEN_IENIO3INT1, PLUM_INT_EXTIEN_REG,
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PLUM_INT_EXTIEN_SENIO3INT1, PLUM_INT_EXTIEN_REG,
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}
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};
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struct plum_intr_entry {
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int pi_enabled;
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int pi_line;
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int (*pi_fun)(void *);
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void *pi_arg;
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const struct plum_intr_ctrl *pi_ctrl;
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};
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struct plumicu_softc {
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struct device sc_dev;
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plum_chipset_tag_t sc_pc;
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bus_space_tag_t sc_regt;
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bus_space_handle_t sc_regh;
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void *sc_ih;
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int sc_enable_count;
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struct plum_intr_entry sc_intr[PLUM_INTR_MAX];
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};
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CFATTACH_DECL(plumicu, sizeof(struct plumicu_softc),
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plumicu_match, plumicu_attach, NULL, NULL);
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#ifdef PLUMICUDEBUG
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void plumicu_dump(struct plumicu_softc *);
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#endif
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int
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plumicu_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return (2); /* 1st attach group */
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}
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void
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plumicu_attach(struct device *parent, struct device *self, void *aux)
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{
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struct plum_attach_args *pa = aux;
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struct plumicu_softc *sc = (void*)self;
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const struct plum_intr_ctrl *pic;
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bus_space_tag_t regt;
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bus_space_handle_t regh;
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plumreg_t reg;
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int i;
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sc->sc_pc = pa->pa_pc;
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sc->sc_regt = pa->pa_regt;
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/* map plum2 interrupt controller register space */
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if (bus_space_map(sc->sc_regt, PLUM_INT_REGBASE,
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PLUM_INT_REGSIZE, 0, &sc->sc_regh)) {
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printf(":interrupt register map failed\n");
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return;
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}
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#ifdef PLUMICUDEBUG
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plumicu_dump(sc);
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#endif
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/* disable all interrupt */
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regt = sc->sc_regt;
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regh = sc->sc_regh;
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for (i = 0; i < PLUM_INTR_MAX; i++) {
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pic = &pi_ctrl[i];
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if (pic->ic_ienreg) {
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reg = plum_conf_read(regt, regh, pic->ic_ienreg);
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reg &= ~pic->ic_ienpat;
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plum_conf_write(regt, regh, pic->ic_ienreg, reg);
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}
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if (pic->ic_senreg) {
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reg = plum_conf_read(regt, regh, pic->ic_senreg);
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reg &= ~pic->ic_senpat;
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plum_conf_write(regt, regh, pic->ic_senreg, reg);
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}
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}
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/* register handle to plum_chipset_tag */
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plum_conf_register_intr(sc->sc_pc, (void*)sc);
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/* disable interrupt redirect to TX39 core */
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plum_di(sc->sc_pc);
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if (!(sc->sc_ih = tx_intr_establish(sc->sc_pc->pc_tc, pa->pa_irq,
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IST_EDGE, IPL_BIO,
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plumicu_intr, sc))) {
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printf(": can't establish interrupt\n");
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}
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printf("\n");
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}
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__inline__ void
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plum_di(plum_chipset_tag_t pc)
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{
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struct plumicu_softc *sc = pc->pc_intrt;
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plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_INT_INTIEN_REG, 0);
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}
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__inline__ void
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plum_ei(plum_chipset_tag_t pc)
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{
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struct plumicu_softc *sc = pc->pc_intrt;
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plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_INT_INTIEN_REG,
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PLUM_INT_INTIEN);
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}
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void*
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plum_intr_establish(plum_chipset_tag_t pc, int line, int mode, int level,
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int (*ih_fun)(void *), void *ih_arg)
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{
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struct plumicu_softc *sc = pc->pc_intrt;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg;
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struct plum_intr_entry *pi;
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if (!LEGAL_PRUM_INTR(line)) {
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panic("plum_intr_establish: bogus interrupt line");
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}
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pi = &sc->sc_intr[line];
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pi->pi_line = line;
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pi->pi_fun = ih_fun;
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pi->pi_arg = ih_arg;
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pi->pi_ctrl = &pi_ctrl[line];
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/* Enable interrupt */
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/* status enable */
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if (pi->pi_ctrl->ic_senreg) {
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reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_senreg);
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reg |= pi->pi_ctrl->ic_senpat;
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plum_conf_write(regt, regh, pi->pi_ctrl->ic_senreg, reg);
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}
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/* interrupt enable */
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if (pi->pi_ctrl->ic_ienreg) {
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reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_ienreg);
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reg |= pi->pi_ctrl->ic_ienpat;
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plum_conf_write(regt, regh, pi->pi_ctrl->ic_ienreg, reg);
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}
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/* Enable redirect to TX39 core */
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DPRINTF(("plum_intr_establish: %d (count=%d)\n", line,
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sc->sc_enable_count));
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if (sc->sc_enable_count++ == 0)
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plum_ei(pc);
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pi->pi_enabled = 1;
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return (ih_fun);
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}
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void
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plum_intr_disestablish(plum_chipset_tag_t pc, void *arg)
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{
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struct plumicu_softc *sc = pc->pc_intrt;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg;
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struct plum_intr_entry *pi;
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int i;
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sc = pc->pc_intrt;
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for (i = 0; i < PLUM_INTR_MAX; i++) {
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pi = &sc->sc_intr[i];
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if (pi->pi_fun != arg)
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continue;
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DPRINTF(("plum_intr_disestablish: %d (count=%d)\n",
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pi->pi_line, sc->sc_enable_count - 1));
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goto found;
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}
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panic("plum_intr_disestablish: can't find entry.");
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/* NOTREACHED */
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found:
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pi->pi_enabled = 0;
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/* Disable interrupt */
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if (pi->pi_ctrl->ic_ienreg) {
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reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_ienreg);
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reg &= ~(pi->pi_ctrl->ic_ienpat);
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plum_conf_write(regt, regh, pi->pi_ctrl->ic_ienreg, reg);
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}
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if (pi->pi_ctrl->ic_senreg) {
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reg = plum_conf_read(regt, regh, pi->pi_ctrl->ic_senreg);
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reg &= ~(pi->pi_ctrl->ic_senpat);
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plum_conf_write(regt, regh, pi->pi_ctrl->ic_senreg, reg);
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}
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/* Disable/Enable interrupt redirect to TX39 core */
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if (--sc->sc_enable_count == 0)
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plum_di(pc);
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}
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int
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plumicu_intr(void *arg)
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{
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struct plumicu_softc *sc = arg;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg1, reg2, reg_ext, reg_pccard;
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int i;
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plum_di(sc->sc_pc);
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/* read level 1 status */
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reg1 = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
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/* read level 2 status and acknowledge */
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reg_ext = plum_conf_read(regt, regh, PLUM_INT_EXTINTS_REG);
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plum_conf_write(regt, regh, PLUM_INT_EXTINTS_REG, reg_ext);
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reg_pccard = plum_conf_read(regt, regh, PLUM_INT_PCCINTS_REG);
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plum_conf_write(regt, regh, PLUM_INT_PCCINTS_REG, reg_pccard);
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for (i = 0; i < PLUM_INTR_MAX; i++) {
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register struct plum_intr_entry *pi;
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register const struct plum_intr_ctrl *pic = &pi_ctrl[i];
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if (!(pic->ic_ackpat1 & reg1))
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continue;
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pi = &sc->sc_intr[i];
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if (!pi->pi_enabled)
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continue;
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if (pic->ic_ackreg2 == 0) {
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(*pi->pi_fun)(pi->pi_arg);
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continue;
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}
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reg2 = pic->ic_ackreg2 == PLUM_INT_PCCINTS_REG
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? reg_pccard : reg_ext;
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if (pic->ic_ackpat2 & reg2)
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(*pi->pi_fun)(pi->pi_arg);
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}
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plum_ei(sc->sc_pc);
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return (0);
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}
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#ifdef PLUMICUDEBUG
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void
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plumicu_dump(struct plumicu_softc *sc)
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{
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg;
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printf("status:");
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reg = plum_conf_read(regt, regh, PLUM_INT_INTSTA_REG);
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dbg_bit_print(reg);
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printf("ExtIO\n");
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printf("status:");
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reg = plum_conf_read(regt, regh, PLUM_INT_EXTINTS_REG);
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dbg_bit_print(reg);
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printf("enable:");
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reg = plum_conf_read(regt, regh, PLUM_INT_EXTIEN_REG);
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dbg_bit_print(reg);
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}
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#endif /* PLUMICUDEBUG */
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