150 lines
4.6 KiB
C
150 lines
4.6 KiB
C
/*-
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* Copyright (c) 1992 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell and Rick Macklem.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)cpu.h 7.7 (Berkeley) 11/15/92
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* $Id: cpu.h,v 1.4 1994/01/15 18:46:00 deraadt Exp $
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*/
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#ifndef _CPU_H_
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#define _CPU_H_
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#include <machine/machConst.h>
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/*
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* Exported definitions unique to pmax/mips cpu support.
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*/
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/*
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* definitions of cpu-dependent requirements
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* referenced in generic code
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*/
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#define COPY_SIGCODE /* copy sigcode above user stack in exec */
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#define cpu_exec(p) (p->p_md.md_ss_addr = 0) /* init single step */
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#define cpu_wait(p) /* nothing */
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#define cpu_setstack(p, ap) \
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(p)->p_md.md_regs[SP] = ap
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/*
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* Arguments to hardclock and gatherstats encapsulate the previous
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* machine state in an opaque clockframe.
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*/
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typedef struct clockframe {
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int pc; /* program counter at time of interrupt */
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int sr; /* status register at time of interrupt */
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} clockframe;
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#define CLKF_USERMODE(framep) ((framep)->sr & MACH_SR_KU_PREV)
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#define CLKF_BASEPRI(framep) \
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((~(framep)->sr & (MACH_INT_MASK | MACH_SR_INT_ENA_PREV)) == 0)
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#define CLKF_PC(framep) ((framep)->pc)
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#define CLKF_INTR(framep) (0)
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/*
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* Preempt the current process if in interrupt from user mode,
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* or after the current trap/syscall if in system mode.
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*/
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#define need_resched() { want_resched = 1; aston(); }
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/*
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* Give a profiling tick to the current process when the user profiling
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* buffer pages are invalid. On the PMAX, request an ast to send us
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* through trap, marking the proc as needing a profiling tick.
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*/
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#define need_proftick(p) { (p)->p_flag |= SOWEUPC; aston(); }
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define signotify(p) aston()
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#define aston() (astpending = 1)
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int astpending; /* need to trap before returning to user mode */
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int want_resched; /* resched() was called */
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/*
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* CPU identification, from PRID register.
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*/
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union cpuprid {
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int cpuprid;
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struct {
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#if BYTE_ORDER == BIG_ENDIAN
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u_int pad1:16; /* reserved */
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u_int cp_imp:8; /* implementation identifier */
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u_int cp_majrev:4; /* major revision identifier */
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u_int cp_minrev:4; /* minor revision identifier */
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#else
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u_int cp_minrev:4; /* minor revision identifier */
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u_int cp_majrev:4; /* major revision identifier */
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u_int cp_imp:8; /* implementation identifier */
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u_int pad1:16; /* reserved */
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#endif
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} cpu;
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};
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/*
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* MIPS CPU types (cp_imp).
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*/
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#define MIPS_R2000 0x01
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#define MIPS_R3000 0x02
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#define MIPS_R6000 0x03
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#define MIPS_R4000 0x04
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#define MIPS_R6000A 0x06
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/*
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* MIPS FPU types
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*/
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#define MIPS_R2010 0x02
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#define MIPS_R3010 0x03
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#define MIPS_R6010 0x04
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#define MIPS_R4010 0x05
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#ifdef KERNEL
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union cpuprid cpu;
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union cpuprid fpu;
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u_int machDataCacheSize;
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u_int machInstCacheSize;
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extern struct intr_tab intr_tab[];
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#endif
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/*
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* Enable realtime clock (always enabled).
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*/
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#define enablertclock()
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#endif /* _CPU_H_ */
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