272 lines
6.2 KiB
C
272 lines
6.2 KiB
C
#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/file.h>
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#include <sys/buf.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <sys/uio.h>
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#include <vm/vm.h>
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#include <machine/pio.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/dmavar.h>
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#include <i386/isa/dmareg.h>
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/* region of physical memory known to be contiguous */
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vm_offset_t isaphysmem;
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static caddr_t dma_bounce[8]; /* XXX */
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static char bounced[8]; /* XXX */
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#define MAXDMASZ 512 /* XXX */
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/* high byte of address is stored in this port for i-th dma channel */
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static short dmapageport[8] =
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{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
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/*
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* isa_dmacascade(): program 8237 DMA controller channel to accept
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* external dma control by a board.
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*/
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void
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isa_dmacascade(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7)
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panic("isa_dmacascade: impossible request");
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#endif
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/* set dma channel mode, and set dma channel mode */
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if ((chan & 4) == 0) {
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outb(DMA1_MODE, DMA37MD_CASCADE | chan);
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outb(DMA1_SMSK, chan);
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} else {
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outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
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outb(DMA2_SMSK, chan & 3);
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}
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}
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/*
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* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
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* problems by using a bounce buffer.
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*/
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void
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isa_dmastart(flags, addr, nbytes, chan)
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int flags;
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caddr_t addr;
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vm_size_t nbytes;
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int chan;
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{
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vm_offset_t phys;
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int waport;
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caddr_t newaddr;
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7 ||
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((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
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(nbytes >= (1<<16))))
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panic("isa_dmastart: impossible request");
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#endif
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if (isa_dmarangecheck(addr, nbytes, chan)) {
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if (dma_bounce[chan] == 0)
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dma_bounce[chan] =
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/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
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(caddr_t) isaphysmem + NBPG*chan;
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bounced[chan] = 1;
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newaddr = dma_bounce[chan];
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*(int *) newaddr = 0; /* XXX */
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/* copy bounce buffer on write */
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if ((flags & B_READ) == 0)
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bcopy(addr, newaddr, nbytes);
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addr = newaddr;
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}
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/* translate to physical */
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phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
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if ((chan & 4) == 0) {
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/*
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* Program one of DMA channels 0..3. These are
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* byte mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (flags & B_READ)
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outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
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outb(DMA1_MODE, chan | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA1_FFC, 0);
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/* send start address */
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waport = DMA1_CHN(chan);
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outb(waport, phys);
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outb(waport, phys>>8);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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outb(waport + 1, --nbytes);
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outb(waport + 1, nbytes>>8);
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/* unmask channel */
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outb(DMA1_SMSK, chan | DMA37SM_CLEAR);
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} else {
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/*
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* Program one of DMA channels 4..7. These are
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* word mode channels.
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*/
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/* set dma channel mode, and reset address ff */
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if (flags & B_READ)
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outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_WRITE);
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else
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outb(DMA2_MODE, (chan & 3) | DMA37MD_SINGLE | DMA37MD_READ);
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outb(DMA2_FFC, 0);
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/* send start address */
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waport = DMA2_CHN(chan & 3);
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outb(waport, phys>>1);
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outb(waport, phys>>9);
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outb(dmapageport[chan], phys>>16);
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/* send count */
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nbytes >>= 1;
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outb(waport + 2, --nbytes);
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outb(waport + 2, nbytes>>8);
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/* unmask channel */
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outb(DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR);
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}
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}
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void
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isa_dmaabort(chan)
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int chan;
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{
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7)
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panic("isa_dmaabort: impossible request");
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#endif
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bounced[chan] = 0;
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/* mask channel */
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if ((chan & 4) == 0)
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outb(DMA1_SMSK, DMA37SM_SET | chan);
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else
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outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
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void
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isa_dmadone(flags, addr, nbytes, chan)
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int flags;
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caddr_t addr;
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vm_size_t nbytes;
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int chan;
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{
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u_char tc;
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#ifdef DIAGNOSTIC
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if (chan < 0 || chan > 7)
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panic("isa_dmadone: impossible request");
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#endif
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/* check that the terminal count was reached */
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if ((chan & 4) == 0)
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tc = inb(DMA1_SR) & (1 << chan);
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else
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tc = inb(DMA2_SR) & (1 << (chan & 3));
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if (tc == 0)
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/* XXX probably should panic or something */
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log(LOG_ERR, "dma channel %d not finished\n", chan);
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/* copy bounce buffer on read */
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if (bounced[chan]) {
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bcopy(dma_bounce[chan], addr, nbytes);
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bounced[chan] = 0;
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}
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/* mask channel */
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if ((chan & 4) == 0)
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outb(DMA1_SMSK, DMA37SM_SET | chan);
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else
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outb(DMA2_SMSK, DMA37SM_SET | (chan & 3));
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}
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/*
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* Check for problems with the address range of a DMA transfer
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* (non-contiguous physical pages, outside of bus address space,
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* crossing DMA page boundaries).
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* Return true if special handling needed.
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*/
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int
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isa_dmarangecheck(va, length, chan)
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vm_offset_t va;
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u_long length;
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int chan;
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{
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vm_offset_t phys, priorpage = 0, endva;
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u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
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endva = round_page(va + length);
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for (; va < endva ; va += NBPG) {
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phys = trunc_page(pmap_extract(pmap_kernel(), va));
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if (phys == 0)
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panic("isa_dmacheck: no physical page present");
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if (phys >= (1<<24))
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return 1;
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if (priorpage) {
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if (priorpage + NBPG != phys)
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return 1;
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/* check if crossing a DMA page boundary */
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if ((priorpage ^ phys) & dma_pgmsk)
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return 1;
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}
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priorpage = phys;
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}
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return 0;
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}
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/* head of queue waiting for physmem to become available */
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struct buf isa_physmemq;
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/* blocked waiting for resource to become free for exclusive use */
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static isaphysmemflag;
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/* if waited for and call requested when free (B_CALL) */
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static void (*isaphysmemunblock)(); /* needs to be a list */
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/*
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* Allocate contiguous physical memory for transfer, returning
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* a *virtual* address to region. May block waiting for resource.
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* (assumed to be called at splbio())
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*/
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caddr_t
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isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
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isaphysmemunblock = func;
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while (isaphysmemflag & B_BUSY) {
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isaphysmemflag |= B_WANTED;
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sleep((caddr_t)&isaphysmemflag, PRIBIO);
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}
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isaphysmemflag |= B_BUSY;
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return((caddr_t)isaphysmem);
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}
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/*
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* Free contiguous physical memory used for transfer.
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* (assumed to be called at splbio())
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*/
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void
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isa_freephysmem(caddr_t va, unsigned length) {
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isaphysmemflag &= ~B_BUSY;
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if (isaphysmemflag & B_WANTED) {
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isaphysmemflag &= B_WANTED;
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wakeup((caddr_t)&isaphysmemflag);
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if (isaphysmemunblock)
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(*isaphysmemunblock)();
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}
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}
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