558 lines
16 KiB
C
558 lines
16 KiB
C
/* $NetBSD: isp_sbus.c,v 1.34 2000/12/23 01:38:02 wiz Exp $ */
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/*
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* This driver, which is contained in NetBSD in the files:
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*
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* sys/dev/ic/isp.c
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* sys/dev/ic/isp_inline.h
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* sys/dev/ic/isp_netbsd.c
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* sys/dev/ic/isp_netbsd.h
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* sys/dev/ic/isp_target.c
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* sys/dev/ic/isp_target.h
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* sys/dev/ic/isp_tpublic.h
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* sys/dev/ic/ispmbox.h
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* sys/dev/ic/ispreg.h
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* sys/dev/ic/ispvar.h
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* sys/microcode/isp/asm_sbus.h
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* sys/microcode/isp/asm_1040.h
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* sys/microcode/isp/asm_1080.h
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* sys/microcode/isp/asm_12160.h
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* sys/microcode/isp/asm_2100.h
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* sys/microcode/isp/asm_2200.h
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* sys/pci/isp_pci.c
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* sys/sbus/isp_sbus.c
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*
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* Is being actively maintained by Matthew Jacob (mjacob@netbsd.org).
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* This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris,
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* Linux versions. This tends to be an interesting maintenance problem.
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*
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* Please coordinate with Matthew Jacob on changes you wish to make here.
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*/
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/*
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* SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
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*
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* Copyright (c) 1997 by Matthew Jacob
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* NASA AMES Research Center
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/autoconf.h>
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#include <dev/ic/isp_netbsd.h>
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#include <dev/microcode/isp/asm_sbus.h>
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#include <dev/sbus/sbusvar.h>
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static int isp_sbus_intr __P((void *));
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static u_int16_t isp_sbus_rd_reg __P((struct ispsoftc *, int));
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static void isp_sbus_wr_reg __P((struct ispsoftc *, int, u_int16_t));
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static int isp_sbus_mbxdma __P((struct ispsoftc *));
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static int isp_sbus_dmasetup __P((struct ispsoftc *, struct scsipi_xfer *,
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ispreq_t *, u_int16_t *, u_int16_t));
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static void isp_sbus_dmateardown __P((struct ispsoftc *, struct scsipi_xfer *,
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u_int32_t));
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#ifndef ISP_1000_RISC_CODE
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#define ISP_1000_RISC_CODE NULL
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#endif
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static struct ispmdvec mdvec = {
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isp_sbus_rd_reg,
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isp_sbus_wr_reg,
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isp_sbus_mbxdma,
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isp_sbus_dmasetup,
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isp_sbus_dmateardown,
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NULL,
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NULL,
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NULL,
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ISP_1000_RISC_CODE
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};
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struct isp_sbussoftc {
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struct ispsoftc sbus_isp;
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struct sbusdev sbus_sd;
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sdparam sbus_dev;
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bus_space_tag_t sbus_bustag;
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bus_dma_tag_t sbus_dmatag;
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bus_space_handle_t sbus_reg;
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int sbus_node;
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int sbus_pri;
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struct ispmdvec sbus_mdvec;
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bus_dmamap_t *sbus_dmamap;
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bus_dmamap_t sbus_request_dmamap;
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bus_dmamap_t sbus_result_dmamap;
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int16_t sbus_poff[_NREG_BLKS];
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};
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static int isp_match __P((struct device *, struct cfdata *, void *));
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static void isp_sbus_attach __P((struct device *, struct device *, void *));
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struct cfattach isp_sbus_ca = {
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sizeof (struct isp_sbussoftc), isp_match, isp_sbus_attach
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};
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static int
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isp_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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int rv;
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#ifdef DEBUG
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static int oneshot = 1;
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#endif
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struct sbus_attach_args *sa = aux;
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rv = (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0 ||
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strcmp("PTI,ptisp", sa->sa_name) == 0 ||
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strcmp("ptisp", sa->sa_name) == 0 ||
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strcmp("SUNW,isp", sa->sa_name) == 0 ||
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strcmp("QLGC,isp", sa->sa_name) == 0);
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#ifdef DEBUG
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if (rv && oneshot) {
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oneshot = 0;
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printf("Qlogic ISP Driver, NetBSD (sbus) Platform Version "
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"%d.%d Core Version %d.%d\n",
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ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
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ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
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}
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#endif
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return (rv);
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}
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static void
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isp_sbus_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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int freq, ispburst, sbusburst;
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struct sbus_attach_args *sa = aux;
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struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self;
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struct ispsoftc *isp = &sbc->sbus_isp;
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printf(" for %s\n", sa->sa_name);
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sbc->sbus_bustag = sa->sa_bustag;
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sbc->sbus_dmatag = sa->sa_dmatag;
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if (sa->sa_nintr != 0)
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sbc->sbus_pri = sa->sa_pri;
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sbc->sbus_mdvec = mdvec;
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if (sa->sa_npromvaddrs != 0) {
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sbc->sbus_reg = (bus_space_handle_t)sa->sa_promvaddrs[0];
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} else {
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if (sbus_bus_map(sa->sa_bustag, sa->sa_slot, sa->sa_offset,
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sa->sa_size, BUS_SPACE_MAP_LINEAR, 0,
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&sbc->sbus_reg) != 0) {
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printf("%s: cannot map registers\n", self->dv_xname);
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return;
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}
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}
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sbc->sbus_node = sa->sa_node;
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freq = getpropint(sa->sa_node, "clock-frequency", 0);
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if (freq) {
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/*
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* Convert from HZ to MHz, rounding up.
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*/
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freq = (freq + 500000)/1000000;
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#if 0
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printf("%s: %d MHz\n", self->dv_xname, freq);
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#endif
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}
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sbc->sbus_mdvec.dv_clock = freq;
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/*
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* Now figure out what the proper burst sizes, etc., to use.
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* Unfortunately, there is no ddi_dma_burstsizes here which
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* walks up the tree finding the limiting burst size node (if
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* any).
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*/
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sbusburst = ((struct sbus_softc *)parent)->sc_burst;
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if (sbusburst == 0)
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sbusburst = SBUS_BURST_32 - 1;
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ispburst = getpropint(sa->sa_node, "burst-sizes", -1);
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if (ispburst == -1) {
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ispburst = sbusburst;
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}
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ispburst &= sbusburst;
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ispburst &= ~(1 << 7);
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ispburst &= ~(1 << 6);
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sbc->sbus_mdvec.dv_conf1 = 0;
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if (ispburst & (1 << 5)) {
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sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32;
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} else if (ispburst & (1 << 4)) {
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sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16;
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} else if (ispburst & (1 << 3)) {
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sbc->sbus_mdvec.dv_conf1 =
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BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8;
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}
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if (sbc->sbus_mdvec.dv_conf1) {
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sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE;
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}
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/*
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* Some early versions of the PTI SBus adapter
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* would fail in trying to download (via poking)
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* FW. We give up on them.
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*/
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if (strcmp("PTI,ptisp", sa->sa_name) == 0 ||
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strcmp("ptisp", sa->sa_name) == 0) {
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sbc->sbus_mdvec.dv_ispfw = NULL;
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}
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isp->isp_mdvec = &sbc->sbus_mdvec;
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isp->isp_bustype = ISP_BT_SBUS;
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isp->isp_type = ISP_HA_SCSI_UNKNOWN;
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isp->isp_param = &sbc->sbus_dev;
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bzero(isp->isp_param, sizeof (sdparam));
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sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
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sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF;
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sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF;
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sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF;
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sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
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/*
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* Set up logging levels.
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*/
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#ifdef ISP_LOGDEFAULT
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isp->isp_dblev = ISP_LOGDEFAULT;
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#else
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isp->isp_dblev = ISP_LOGCONFIG|ISP_LOGWARN|ISP_LOGERR;
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#ifdef SCSIDEBUG
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isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2;
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#endif
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#ifdef DEBUG
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isp->isp_dblev |= ISP_LOGDEBUG0|ISP_LOGINFO;
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#endif
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#endif
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isp->isp_confopts = self->dv_cfdata->cf_flags;
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/*
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* There's no tool on sparc to set NVRAM for ISPs, so ignore it.
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*/
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isp->isp_confopts |= ISP_CFG_NONVRAM;
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ISP_LOCK(isp);
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isp->isp_osinfo.no_mbox_ints = 1;
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isp_reset(isp);
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if (isp->isp_state != ISP_RESETSTATE) {
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ISP_UNLOCK(isp);
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return;
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}
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isp_init(isp);
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if (isp->isp_state != ISP_INITSTATE) {
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isp_uninit(isp);
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ISP_UNLOCK(isp);
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return;
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}
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/* Establish interrupt channel */
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bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO, 0,
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isp_sbus_intr, sbc);
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ENABLE_INTS(isp);
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ISP_UNLOCK(isp);
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sbus_establish(&sbc->sbus_sd, &sbc->sbus_isp.isp_osinfo._dev);
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/*
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* do generic attach.
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*/
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isp_attach(isp);
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if (isp->isp_state != ISP_RUNSTATE) {
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isp_uninit(isp);
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}
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}
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static int
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isp_sbus_intr(arg)
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void *arg;
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{
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int rv;
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struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)arg;
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bus_dmamap_sync(sbc->sbus_dmatag, sbc->sbus_result_dmamap, 0,
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sbc->sbus_result_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
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sbc->sbus_isp.isp_osinfo.onintstack = 1;
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rv = isp_intr(arg);
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sbc->sbus_isp.isp_osinfo.onintstack = 0;
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return (rv);
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}
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static u_int16_t
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isp_sbus_rd_reg(isp, regoff)
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struct ispsoftc *isp;
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int regoff;
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{
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struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
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int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
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offset += (regoff & 0xff);
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return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset));
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}
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static void
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isp_sbus_wr_reg(isp, regoff, val)
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struct ispsoftc *isp;
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int regoff;
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u_int16_t val;
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{
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struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
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int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
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offset += (regoff & 0xff);
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bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);
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}
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static int
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isp_sbus_mbxdma(isp)
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struct ispsoftc *isp;
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{
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struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
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bus_dma_tag_t dmatag = sbc->sbus_dmatag;
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bus_dma_segment_t seg;
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int rs, i;
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size_t n;
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bus_size_t len;
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if (isp->isp_rquest_dma)
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return (0);
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n = sizeof (XS_T **) * isp->isp_maxcmds;
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isp->isp_xflist = (XS_T **) malloc(n, M_DEVBUF, M_WAITOK);
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if (isp->isp_xflist == NULL) {
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isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
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return (1);
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}
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bzero(isp->isp_xflist, n);
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n = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
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sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK);
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if (sbc->sbus_dmamap == NULL) {
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free(isp->isp_xflist, M_DEVBUF);
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isp->isp_xflist = NULL;
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isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array");
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return (1);
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}
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for (i = 0; i < isp->isp_maxcmds; i++) {
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/* Allocate a DMA handle */
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if (bus_dmamap_create(dmatag, MAXPHYS, 1, MAXPHYS, 0,
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BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) {
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isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error");
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break;
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}
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}
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if (i < isp->isp_maxcmds) {
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while (--i >= 0) {
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bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]);
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}
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free(isp->isp_xflist, M_DEVBUF);
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free(sbc->sbus_dmamap, M_DEVBUF);
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isp->isp_xflist = NULL;
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sbc->sbus_dmamap = NULL;
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return (1);
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}
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/*
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* Allocate and map the request queue.
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*/
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len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
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/* Allocate DMA map */
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if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT,
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&sbc->sbus_request_dmamap) != 0) {
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goto dmafail;
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}
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/* Allocate DMA buffer */
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if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) {
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goto dmafail;
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}
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/* Load the buffer */
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if (bus_dmamap_load_raw(dmatag, sbc->sbus_request_dmamap,
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&seg, rs, len, BUS_DMA_NOWAIT) != 0) {
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bus_dmamem_free(dmatag, &seg, rs);
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goto dmafail;
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}
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isp->isp_rquest_dma = sbc->sbus_request_dmamap->dm_segs[0].ds_addr;
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/* Map DMA buffer in CPU addressable space */
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if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_rquest,
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BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
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bus_dmamap_unload(dmatag, sbc->sbus_request_dmamap);
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bus_dmamem_free(dmatag, &seg, rs);
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goto dmafail;
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}
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/*
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* Allocate and map the result queue.
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*/
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len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
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/* Allocate DMA map */
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if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT,
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&sbc->sbus_result_dmamap) != 0) {
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goto dmafail;
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}
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/* Allocate DMA buffer */
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if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) {
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goto dmafail;
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}
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/* Load the buffer */
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if (bus_dmamap_load_raw(dmatag, sbc->sbus_result_dmamap,
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&seg, rs, len, BUS_DMA_NOWAIT) != 0) {
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bus_dmamem_free(dmatag, &seg, rs);
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goto dmafail;
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}
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/* Map DMA buffer in CPU addressable space */
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if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_result,
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BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
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bus_dmamap_unload(dmatag, sbc->sbus_result_dmamap);
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bus_dmamem_free(dmatag, &seg, rs);
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goto dmafail;
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}
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isp->isp_result_dma = sbc->sbus_result_dmamap->dm_segs[0].ds_addr;
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return (0);
|
|
|
|
dmafail:
|
|
for (i = 0; i < isp->isp_maxcmds; i++) {
|
|
bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]);
|
|
}
|
|
free(sbc->sbus_dmamap, M_DEVBUF);
|
|
free(isp->isp_xflist, M_DEVBUF);
|
|
isp->isp_xflist = NULL;
|
|
sbc->sbus_dmamap = NULL;
|
|
return (1);
|
|
}
|
|
|
|
/*
|
|
* Map a DMA request.
|
|
* We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds.
|
|
*/
|
|
|
|
static int
|
|
isp_sbus_dmasetup(isp, xs, rq, iptrp, optr)
|
|
struct ispsoftc *isp;
|
|
struct scsipi_xfer *xs;
|
|
ispreq_t *rq;
|
|
u_int16_t *iptrp;
|
|
u_int16_t optr;
|
|
{
|
|
struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
|
|
bus_dmamap_t dmap;
|
|
ispcontreq_t *crq;
|
|
int cansleep = (xs->xs_control & XS_CTL_NOSLEEP) == 0;
|
|
int in = (xs->xs_control & XS_CTL_DATA_IN) != 0;
|
|
|
|
if (xs->datalen == 0) {
|
|
rq->req_seg_count = 1;
|
|
goto mbxsync;
|
|
}
|
|
|
|
dmap = sbc->sbus_dmamap[isp_handle_index(rq->req_handle)];
|
|
if (dmap->dm_nsegs != 0) {
|
|
panic("%s: dma map already allocated\n", isp->isp_name);
|
|
/* NOTREACHED */
|
|
}
|
|
if (bus_dmamap_load(sbc->sbus_dmatag, dmap, xs->data, xs->datalen,
|
|
NULL, cansleep? BUS_DMA_WAITOK : BUS_DMA_NOWAIT) != 0) {
|
|
XS_SETERR(xs, HBA_BOTCH);
|
|
return (CMD_COMPLETE);
|
|
}
|
|
|
|
bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr,
|
|
xs->datalen, in? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
|
|
|
|
if (in) {
|
|
rq->req_flags |= REQFLAG_DATA_IN;
|
|
} else {
|
|
rq->req_flags |= REQFLAG_DATA_OUT;
|
|
}
|
|
|
|
if (XS_CDBLEN(xs) > 12) {
|
|
crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp);
|
|
*iptrp = ISP_NXT_QENTRY(*iptrp, RQUEST_QUEUE_LEN(isp));
|
|
if (*iptrp == optr) {
|
|
isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
|
|
bus_dmamap_unload(sbc->sbus_dmatag, dmap);
|
|
XS_SETERR(xs, HBA_BOTCH);
|
|
return (CMD_EAGAIN);
|
|
}
|
|
rq->req_seg_count = 2;
|
|
rq->req_dataseg[0].ds_count = 0;
|
|
rq->req_dataseg[0].ds_base = 0;
|
|
bzero((void *)crq, sizeof (*crq));
|
|
crq->req_header.rqs_entry_count = 1;
|
|
crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
|
|
crq->req_dataseg[0].ds_count = xs->datalen;
|
|
crq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr;
|
|
ISP_SBUSIFY_ISPHDR(isp, &crq->req_header)
|
|
} else {
|
|
rq->req_dataseg[0].ds_count = xs->datalen;
|
|
rq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr;
|
|
rq->req_seg_count = 1;
|
|
}
|
|
|
|
mbxsync:
|
|
ISP_SWIZZLE_REQUEST(isp, rq);
|
|
#if 0
|
|
/*
|
|
* If we ever map cacheable memory, we need to do something like this.
|
|
*/
|
|
bus_dmamap_sync(sbc->sbus_dmat, sbc->sbus_rquest_dmap, 0,
|
|
sbc->sbus_rquest_dmap->dm_mapsize, BUS_DMASYNC_PREWRITE);
|
|
#endif
|
|
return (CMD_QUEUED);
|
|
}
|
|
|
|
static void
|
|
isp_sbus_dmateardown(isp, xs, handle)
|
|
struct ispsoftc *isp;
|
|
struct scsipi_xfer *xs;
|
|
u_int32_t handle;
|
|
{
|
|
struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
|
|
bus_dmamap_t dmap;
|
|
|
|
dmap = sbc->sbus_dmamap[isp_handle_index(handle)];
|
|
|
|
if (dmap->dm_nsegs == 0) {
|
|
panic("%s: dma map not already allocated\n", isp->isp_name);
|
|
/* NOTREACHED */
|
|
}
|
|
bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr,
|
|
xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)?
|
|
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
|
|
bus_dmamap_unload(sbc->sbus_dmatag, dmap);
|
|
}
|