200 lines
6.3 KiB
C
200 lines
6.3 KiB
C
/* $NetBSD: if_tlregs.h,v 1.4 1998/08/15 16:58:53 bouyer Exp $ */
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/*
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* Copyright (c) 1997 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#if !defined(_DEV_PCI_IF_TLREGS_H_)
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#define _DEV_PCI_IF_TLREGS_H_
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#define PCI_CFID 0x00 /* Configuration ID */
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#define PCI_CFCS 0x04 /* Configurtion Command/Status */
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#define PCI_CFRV 0x08 /* Configuration Revision */
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#define PCI_CFLT 0x0c /* Configuration Latency Timer */
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#define PCI_CBIO 0x10 /* Configuration Base IO Address */
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#define PCI_CBMA 0x14 /* Configuration Base Memory Address */
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#define PCI_CFIT 0x3c /* Configuration Interrupt */
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#define PCI_CFDA 0x40 /* Configuration Driver Area */
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/* Host registers */
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#define TL_HOST_CMD 0x00
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#define TL_HOST_CH_PARM 0x04
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#define TL_HOST_INTR_DIOADR 0x08
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# define TL_HOST_INTR_MASK 0xffff0000
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# define TL_HOST_DIOADR_MASK 0x0000ffff
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#define TL_HOST_DIO_DATA 0x0c
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#define TL_INTR_MASK 0x001c0000
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#define TL_INTR_TxEOF 0x00040000
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#define TL_INTR_Stat 0x00080000
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#define TL_INTR_RxEOF 0x000c0000
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#define TL_INTR_Dumm 0x00100000
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#define TL_INTR_TxEOC 0x00140000
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#define TL_INTR_Adc 0x00180000
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#define TL_INTR_RxEOC 0x001c0000
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#define TL_INTVec_MASK 0x1fe00000
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/* HOST_CMD bits */
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#define HOST_CMD_GO 0x80000000
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#define HOST_CMD_STOP 0x40000000
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#define HOST_CMD_ACK 0x20000000
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#define HOST_CMD_CHSEL_mask 0x1fe00000
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#define HOST_CMD_EOC 0x00100000
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#define HOST_CMD_RT 0x00080000
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#define HOST_CMD_Nes 0x00040000
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#define HOST_CMD_Ad_Rst 0x00008000
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#define HOST_CMD_LdTmr 0x00004000
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#define HOST_CMD_LdThr 0x00002000
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#define HOST_CMD_ReqInt 0x00001000
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#define HOST_CMD_IntOff 0x00000800
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#define HOST_CMD_IntOn 0x00000400
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#define HOST_CMD_AckCnt_mask 0x000000ff
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/* Internal registers */
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#define TL_INT_NET 0x00
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# define TL_INT_NetCmd 0x00 /* offsets from TL_INT_NET */
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# define TL_INT_NetSio 0x01
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# define TL_INT_NetSts 0x02
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# define TL_INT_NetMask 0x03
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#define TL_INT_NetConfig 0x04
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#define TL_INT_Defaults 0x08
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#define TL_INT_Areg0 0x10
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#define TL_INT_HASH1 0x28
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#define TL_INT_HASH2 0x2c
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#define TL_INT_STATS_TX 0x30
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#define TL_INT_STATS_RX 0x34
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#define TL_INT_STATS_FERR 0x38
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# define TL_FERR_DEF 0x0000ffff
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# define TL_FERR_CRC 0x00ff0000
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# define TL_FERR_CODE 0xff000000
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#define TL_INT_STATS_COLL 0x3c
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# define TL_COL_MULTI 0x0000ffff
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# define TL_COL_SINGLE 0xffff0000
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#define TL_INT_LERR 0x40
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# define TL_LERR_ECOLL 0x000000ff
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# define TL_LERR_LCOLL 0x0000ff00
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# define TL_LERR_CL 0x00ff0000
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# define TL_LERR_AC 0xff000000
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#define TL_INT_MISC 0x44
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# define TL_MISC_LED 0x1
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# define TL_MISC_BSIZE 0x2
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# define TL_MISC_MaxRxL 0x3
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# define TL_MISC_MaxRxH 0x4
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/* LEDs for the Integrated Netelligent 10/100 TX */
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#define TL_LED_LINK 0x01
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#define TL_LED_ACT 0x10
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/* NETCOMMAND bits */
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#define TL_NETCOMMAND_NRESET 0x80
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#define TL_NETCOMMAND_NWRAP 0x40
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#define TL_NETCOMMAND_CSF 0x20
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#define TL_NETCOMMAND_CAF 0x10
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#define TL_NETCOMMAND_NOBRX 0x08
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#define TL_NETCOMMAND_DUPLEX 0x04
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#define TL_NETCOMMAND_TRFRAM 0x02
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#define TL_NETCOMMAND_TXPACE 0x01
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/* NETCONFIG bits */
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#define TL_NETCONFIG_Trclk 0x8000
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#define TL_NETCONFIG_Ttclk 0x4000
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#define TL_NETCONFIG_Brate 0x2000
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#define TL_NETCONFIG_RxCRC 0x1000
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#define TL_NETCONFIG_PEF 0x0800
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#define TL_NETCONFIG_1F 0x0400
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#define TL_NETCONFIG_1chn 0x0200
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#define TL_NETCONFIG_Mtest 0x0100
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#define TL_NETCONFIG_PHY_EN 0x0080
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#define TL_NETCONFIG_MAC_MASK 0x007f
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/* NetSio bits definition */
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#define TL_NETSIO_MDATA 0x01
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#define TL_NETSIO_MTXEN 0x02
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#define TL_NETSIO_MCLK 0x04
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#define TL_NETSIO_NMRST 0x08
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#define TL_NETSIO_EDATA 0x10
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#define TL_NETSIO_ETXEN 0x20
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#define TL_NETSIO_ECLOCK 0x40
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#define TL_NETSIO_MINTEN 0x80
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/* NetSts buts definition */
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#define TL_NETSTS_MIRQ 0x80
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#define TL_NETSTS_HBEAT 0x40
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#define TL_NETSTS_TXSTOP 0x20
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#define TL_NETSTS_RXSTOP 0x10
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/* Linked lists for receive/transmit of datagrams */
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struct tl_data_seg {
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u_int32_t data_count;
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u_int32_t data_addr;
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};
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/* Receive list (one_frag = 1) */
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struct tl_Rx_list {
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u_int32_t fwd;
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u_int32_t stat;
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struct tl_data_seg seg;
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};
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#define TL_RX_CSTAT_CPLT 0x4000 /* Frame complete */
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#define TL_RX_CSTAT_EOC 0x0800 /* Rx EOC */
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#define TL_RX_CSTAT_Err 0x0400 /* Error frame */
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/* transmit list */
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#define TL_NSEG 10
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#define TL_LAST_SEG 0x80000000
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struct tl_Tx_list {
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u_int32_t fwd;
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u_int32_t stat;
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struct tl_data_seg seg[TL_NSEG];
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};
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#define TL_TX_CSTAT_CPLT 0x4000 /* Frame complete */
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#define TL_TX_CSTAT_EOC 0x0800 /* Tx EOC */
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/*
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* Structs used by the host used for lists management. Note that the adapter's
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* lists must start on an 8 bytes boundary.
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*/
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struct Tx_list {
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struct mbuf *m; /* mbuf associated with this list */
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struct Tx_list* next;
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struct tl_Tx_list hw_list;
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};
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struct Rx_list {
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struct mbuf *m; /* mbuf associated with this list */
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struct Rx_list *next;
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struct tl_Rx_list hw_list;
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};
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#endif /* ! _DEV_PCI_IF_TLREGS_H_ */
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