137 lines
3.7 KiB
C
137 lines
3.7 KiB
C
/*
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* LANCE Ethernet driver header file
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*
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* Copyright (c) 1994 Charles Hannum.
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*
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* Copyright (C) 1993, Paul Richards. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided
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* that the above copyright and these terms are retained. Under no
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* circumstances is the author responsible for the proper functioning
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* of this software, nor does the author assume any responsibility
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* for damages incurred with its use.
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*
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* $Id: if_lereg.h,v 1.2 1994/07/05 21:20:22 mycroft Exp $
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*/
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/* Declarations specific to this driver */
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#define NTBUF 2
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#define TLEN 1
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#define NRBUF 8
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#define RLEN 3
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#define BUFSIZE 1518
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/* Board types */
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#define BICC 1
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#define BICC_RDP 0xc
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#define BICC_RAP 0xe
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#define NE2100 2
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#define NE2100_RDP 0x10
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#define NE2100_RAP 0x12
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#define DEPCA 3
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#define DEPCA_RDP 0x4
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#define DEPCA_RAP 0x6
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/* Chip types */
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#define PROBE_MASK 0x0007
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#define LANCE 1
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#define LANCE_MASK 0x0007
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#define PCnet_ISA 2
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#define PCnet_ISA_MASK 0x0000
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/*
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* Control and status bits
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*/
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#define LE_SERR 0x8000
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#define LE_BABL 0x4000
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#define LE_CERR 0x2000
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#define LE_MISS 0x1000
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#define LE_MERR 0x0800
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#define LE_RINT 0x0400
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#define LE_TINT 0x0200
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#define LE_IDON 0x0100
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#define LE_INTR 0x0080
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#define LE_INEA 0x0040
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#define LE_RXON 0x0020
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#define LE_TXON 0x0010
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#define LE_TDMD 0x0008
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#define LE_STOP 0x0004
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#define LE_STRT 0x0002
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#define LE_INIT 0x0001
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#define LE_BSWP 0x0004
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#define LE_ACON 0x0002
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#define LE_BCON 0x0001
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/*
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* LANCE initialization block
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*/
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struct init_block {
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u_short mode; /* mode register */
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u_char padr[6]; /* ethernet address */
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u_long ladrf[2]; /* logical address filter (multicast) */
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u_short rdra; /* low order pointer to receive ring */
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u_short rlen; /* high order pointer and no. rings */
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u_short tdra; /* low order pointer to transmit ring */
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u_short tlen; /* high order pointer and no rings */
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};
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/*
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* Mode bits -- init_block
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*/
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#define LE_PROM 0x8000 /* promiscuous */
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#define LE_INTL 0x0040 /* internal loopback */
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#define LE_DRTY 0x0020 /* disable retry */
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#define LE_COLL 0x0010 /* force collision */
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#define LE_DTCR 0x0008 /* disable transmit crc */
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#define LE_LOOP 0x0004 /* loopback */
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#define LE_DTX 0x0002 /* disable transmitter */
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#define LE_DRX 0x0001 /* disable receiver */
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#define LE_NORMAL 0x0000
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/*
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* Message descriptor
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*/
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struct mds {
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u_short addr;
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u_short flags;
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u_short bcnt;
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u_short mcnt;
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};
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/* Message descriptor flags */
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#define LE_OWN 0x8000 /* owner bit, 0=host, 1=LANCE */
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#define LE_ERR 0x4000 /* error */
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#define LE_STP 0x0200 /* start of packet */
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#define LE_ENP 0x0100 /* end of packet */
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/* Receive ring status flags */
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#define LE_FRAM 0x2000 /* framing error error */
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#define LE_OFLO 0x1000 /* silo overflow */
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#define LE_CRC 0x0800 /* CRC error */
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#define LE_RBUFF 0x0400 /* buffer error */
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/* Transmit ring status flags */
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#define LE_MORE 0x1000 /* more than 1 retry */
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#define LE_ONE 0x0800 /* one retry */
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#define LE_DEF 0x0400 /* deferred transmit */
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/* Transmit errors */
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#define LE_TBUFF 0x8000 /* buffer error */
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#define LE_UFLO 0x4000 /* silo underflow */
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#define LE_LCOL 0x1000 /* late collision */
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#define LE_LCAR 0x0800 /* loss of carrier */
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#define LE_RTRY 0x0400 /* tried 16 times */
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/* DEPCA-specific definitions */
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#define DEPCA_CSR 0x0
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#define DEPCA_CSR_SHE 0x80 /* Shared memory enabled */
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#define DEPCA_CSR_SWAP32 0x40 /* Byte swapped */
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#define DEPCA_CSR_DUM 0x08 /* rev E compatibility */
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#define DEPCA_CSR_IM 0x04 /* Interrupt masked */
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#define DEPCA_CSR_IEN 0x02 /* Interrupt enabled */
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#define DEPCA_CSR_NORMAL \
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(DEPCA_CSR_SHE | DEPCA_CSR_DUM | DEPCA_CSR_IEN)
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#define DEPCA_ADP 0xc
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