0b6370bfee
this insn is available only on ARM arch v3 and later (and 2a). We don't expect to be using these ops in the kernel on processors too old to have SWP, and for userland uses (in e.g. a pthread library), the kernel will simply have to trap and emulate the insn (it needs to be "atomic", so a kernel trap of some sort will be necessary on such platforms anyway). |
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.. | ||
arm | ||
arm32 | ||
conf | ||
footbridge | ||
include | ||
iomd | ||
mainbus | ||
sa11x0 | ||
xscale | ||
Makefile |