368 lines
9.4 KiB
C
368 lines
9.4 KiB
C
/*
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* Copyright (c) 1995 Per Fogelstrom
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* Copyright (c) 1993, 1994 Charles M. Hannum.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz and Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <machine/intr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#define IO_ICU1 0x020
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#define IO_ICU2 0x0a0
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#define IRQ_SLAVE 2
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#define ICU_LEN 16
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u_int8_t isa_inb(int);
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void isa_outb(int, u_int8_t);
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__inline u_int8_t isa_inb(int x)
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{
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return (*((volatile unsigned char *) (0xb0000000 | (x))));
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}
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__inline void isa_outb(int x, u_int8_t y)
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{
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*((volatile unsigned char *) (0xb0000000 | x)) = y;
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DELAY(100);
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}
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typedef int isa_chipset_tag_t;
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void * intr_establish(isa_chipset_tag_t, int, int, int, int (*)(void *),
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void *);
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void intr_disestablish(isa_chipset_tag_t, void*);
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int iointr(unsigned int, struct clockframe *);
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void initicu(void);
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void intr_calculatemasks(void);
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int fakeintr(void *a);
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char * isa_intr_typename(int);
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#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != 2)
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struct intrhand {
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struct intrhand *ih_next;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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u_long ih_count;
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int ih_level;
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int ih_irq;
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char *ih_what;
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};
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int imen;
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int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
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struct intrhand *intrhand[ICU_LEN];
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int fakeintr(a)
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void *a;
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{
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return 0;
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}
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/*
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* Recalculate the interrupt masks from scratch.
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* We could code special registry and deregistry versions of this function that
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* would be faster, but the code would be nastier, and we don't expect this to
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* happen very much anyway.
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*/
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void
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intr_calculatemasks()
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{
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int irq, level;
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struct intrhand *q;
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/* First, figure out which levels each IRQ uses. */
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for (irq = 0; irq < ICU_LEN; irq++) {
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register int levels = 0;
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for (q = intrhand[irq]; q; q = q->ih_next)
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levels |= 1 << q->ih_level;
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intrlevel[irq] = levels;
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}
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/* Then figure out which IRQs use each level. */
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for (level = 0; level < 5; level++) {
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register int irqs = 0;
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for (irq = 0; irq < ICU_LEN; irq++)
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if (intrlevel[irq] & (1 << level))
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irqs |= 1 << irq;
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imask[level] = irqs | SIR_ALLMASK;
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}
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/*
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* There are tty, network and disk drivers that use free() at interrupt
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* time, so imp > (tty | net | bio).
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*/
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imask[IPL_IMP] |= imask[IPL_TTY] | imask[IPL_NET] | imask[IPL_BIO];
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/*
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* Enforce a hierarchy that gives slow devices a better chance at not
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* dropping data.
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*/
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imask[IPL_TTY] |= imask[IPL_NET] | imask[IPL_BIO];
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imask[IPL_NET] |= imask[IPL_BIO];
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/*
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* These are pseudo-levels.
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*/
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imask[IPL_NONE] = 0x00000000;
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imask[IPL_HIGH] = 0xffffffff;
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/* And eventually calculate the complete masks. */
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for (irq = 0; irq < ICU_LEN; irq++) {
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register int irqs = 1 << irq;
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for (q = intrhand[irq]; q; q = q->ih_next)
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irqs |= imask[q->ih_level];
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intrmask[irq] = irqs | SIR_ALLMASK;
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}
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/* Lastly, determine which IRQs are actually in use. */
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{
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register int irqs = 0;
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for (irq = 0; irq < ICU_LEN; irq++)
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if (intrhand[irq])
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irqs |= 1 << irq;
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if (irqs >= 0x100) /* any IRQs >= 8 in use */
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irqs |= 1 << IRQ_SLAVE;
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imen = ~irqs;
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isa_outb(IO_ICU1 + 1, imen);
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isa_outb(IO_ICU2 + 1, imen >> 8);
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}
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}
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/*
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* Establish a ISA bus interrupt.
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*/
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void *
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intr_establish(ic, irq, type, level, ih_fun, ih_arg)
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isa_chipset_tag_t ic;
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int irq;
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int type;
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int level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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struct intrhand **p, *q, *ih;
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static struct intrhand fakehand = {NULL, fakeintr};
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extern int cold;
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/* no point in sleeping unless someone can free memory. */
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ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
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if (ih == NULL)
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panic("pci_intr_establish: can't malloc handler info");
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if (!LEGAL_IRQ(irq) || type == IST_NONE)
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panic("intr_establish: bogus irq or type");
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switch (intrtype[irq]) {
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case IST_EDGE:
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case IST_LEVEL:
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if (type == intrtype[irq])
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break;
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case IST_PULSE:
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if (type != IST_NONE)
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panic("intr_establish: can't share %s with %s",
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isa_intr_typename(intrtype[irq]),
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isa_intr_typename(type));
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break;
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}
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/*
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* Figure out where to put the handler.
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* This is O(N^2), but we want to preserve the order, and N is
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* generally small.
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*/
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for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
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;
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/*
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* Actually install a fake handler momentarily, since we might be doing
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* this with interrupts enabled and don't want the real routine called
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* until masking is set up.
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*/
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fakehand.ih_level = level;
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*p = &fakehand;
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intr_calculatemasks();
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/*
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* Poke the real handler in now.
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*/
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ih->ih_fun = ih_fun;
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ih->ih_arg = ih_arg;
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ih->ih_count = 0;
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ih->ih_next = NULL;
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ih->ih_level = level;
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ih->ih_irq = irq;
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ih->ih_what = ""; /* XXX - should be eliminated */
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*p = ih;
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return (ih);
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}
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void
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intr_disestablish(ic, arg)
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isa_chipset_tag_t ic;
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void *arg;
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{
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return;
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}
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/*
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* Process an interrupt from the ISA bus.
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*/
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int
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iointr(mask, cf)
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unsigned mask;
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struct clockframe *cf;
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{
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struct intrhand *ih;
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int isa_vector;
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int o_imen;
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char vector;
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(void) &isa_vector; /* shut off gcc unused-variable warnings */
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#if 1
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isa_outb(IO_ICU1, 0x0f); /* Poll */
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vector = isa_inb(IO_ICU1);
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if(vector > 0 || (isa_vector = vector & 7) == 2) {
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isa_outb(IO_ICU2, 0x0f);
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vector = isa_inb(IO_ICU2);
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if(vector > 0)
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return(~0);
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isa_vector = (vector & 7) | 8;
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}
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#endif
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o_imen = imen;
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imen |= 1 << (isa_vector & (ICU_LEN - 1));
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if(isa_vector & 0x08) {
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isa_inb(IO_ICU2 + 1);
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isa_outb(IO_ICU2 + 1, imen >> 8);
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isa_outb(IO_ICU2, 0x60 + (isa_vector & 7));
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isa_outb(IO_ICU1, 0x60 + IRQ_SLAVE);
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}
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else {
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isa_inb(IO_ICU1 + 1);
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isa_outb(IO_ICU1 + 1, imen);
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isa_outb(IO_ICU1, 0x60 + isa_vector);
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}
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ih = intrhand[isa_vector];
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while(ih) {
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(*ih->ih_fun)(ih->ih_arg);
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ih = ih->ih_next;
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}
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imen = o_imen;
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isa_inb(IO_ICU1 + 1);
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isa_inb(IO_ICU2 + 1);
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isa_outb(IO_ICU1 + 1, imen);
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isa_outb(IO_ICU2 + 1, imen >> 8);
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return(~0); /* Dont reenable */
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}
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/*
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* Initialize the interrupt controller logic.
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*/
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void
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initicu()
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{
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isa_outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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isa_outb(IO_ICU1+1, 0); /* starting at this vector index */
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isa_outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
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isa_outb(IO_ICU1+1, 1); /* 8086 mode */
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isa_outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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isa_outb(IO_ICU1, 0x68); /* special mask mode (if available) */
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isa_outb(IO_ICU1, 0x0a); /* Read IRR by default. */
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isa_outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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isa_outb(IO_ICU2+1, 8); /* staring at this vector index */
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isa_outb(IO_ICU2+1, IRQ_SLAVE);
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isa_outb(IO_ICU2+1, 1); /* 8086 mode */
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isa_outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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isa_outb(IO_ICU2, 0x68); /* special mask mode (if available) */
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isa_outb(IO_ICU2, 0x0a); /* Read IRR by default. */
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/*
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* Initialize the VT82C586.
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* XXX
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*/
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isa_outb(0x20, 0x10);
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isa_outb(0x21, 0x00);
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isa_outb(0x21, 0x00);
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isa_outb(0xa0, 0x10);
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isa_outb(0xa1, 0x00);
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isa_outb(0xa1, 0x00);
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}
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char *
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isa_intr_typename(type)
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int type;
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{
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switch (type) {
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case IST_NONE :
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return ("none");
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case IST_PULSE:
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return ("pulsed");
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case IST_EDGE:
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return ("edge-triggered");
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case IST_LEVEL:
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return ("level-triggered");
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default:
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panic("isa_intr_typename: invalid type %d", type);
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}
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}
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