400 lines
9.4 KiB
C
400 lines
9.4 KiB
C
/* $NetBSD: gtsc.c,v 1.11 1995/02/12 19:19:07 chopps Exp $ */
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/*
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* Copyright (c) 1994 Christian E. Hopps
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)dma.c
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <amiga/amiga/custom.h>
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#include <amiga/amiga/cc.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/isr.h>
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#include <amiga/dev/dmavar.h>
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#include <amiga/dev/sbicreg.h>
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#include <amiga/dev/sbicvar.h>
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#include <amiga/dev/gtscreg.h>
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#include <amiga/dev/zbusvar.h>
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#include <amiga/dev/gvpbusvar.h>
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void gtscattach __P((struct device *, struct device *, void *));
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int gtscmatch __P((struct device *, struct cfdata *, void *));
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int gtscprint __P((void *auxp, char *));
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void gtsc_dmafree __P((struct sbic_softc *));
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void gtsc_dmastop __P((struct sbic_softc *));
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int gtsc_dmanext __P((struct sbic_softc *));
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int gtsc_dmaintr __P((struct sbic_softc *));
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int gtsc_dmago __P((struct sbic_softc *, char *, int, int));
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struct scsi_adapter gtsc_scsiswitch = {
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sbic_scsicmd,
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sbic_minphys,
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0, /* no lun support */
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0, /* no lun support */
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};
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struct scsi_device gtsc_scsidev = {
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NULL, /* use default error handler */
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NULL, /* have a queue served by this ??? */
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NULL, /* have no async handler ??? */
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NULL, /* Use default done routine */
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};
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int gtsc_maxdma = 0; /* Maximum size per DMA transfer */
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int gtsc_dmamask = 0;
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int gtsc_dmabounce = 0;
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#ifdef DEBUG
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void gtsc_dmatimeout __P((void *));
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int gtsc_debug = 0;
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#endif
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struct cfdriver gtsccd = {
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NULL, "gtsc", (cfmatch_t)gtscmatch, gtscattach,
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DV_DULL, sizeof(struct sbic_softc), NULL, 0 };
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int
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gtscmatch(pdp, cdp, auxp)
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struct device *pdp;
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struct cfdata *cdp;
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void *auxp;
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{
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struct gvpbus_args *gap;
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gap = auxp;
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if (gap->flags & GVP_SCSI)
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return(1);
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return(0);
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}
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/*
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* attach all devices on our board.
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*/
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void
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gtscattach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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volatile struct sdmac *rp;
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struct gvpbus_args *gap;
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struct sbic_softc *sc;
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gap = auxp;
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sc = (struct sbic_softc *)dp;
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sc->sc_cregs = rp = gap->zargs.va;
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/*
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* disable ints and reset bank register
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*/
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rp->CNTR = 0;
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if ((gap->flags & GVP_NOBANK) == 0)
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rp->bank = 0;
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sc->sc_dmago = gtsc_dmago;
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sc->sc_dmafree = gtsc_dmafree;
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sc->sc_dmanext = gtsc_dmanext;
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sc->sc_dmastop = gtsc_dmastop;
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sc->sc_dmacmd = 0;
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#ifdef DEBUG
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/* make sure timeout is really not needed */
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timeout((void *)gtsc_dmatimeout, 0, 30 * hz);
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#endif
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sc->sc_flags |= SBICF_BADDMA;
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if (gtsc_dmamask)
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sc->sc_dmamask = gtsc_dmamask;
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else if (gap->flags & GVP_24BITDMA)
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sc->sc_dmamask = ~0x00ffffff;
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else if (gap->flags & GVP_25BITDMA)
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sc->sc_dmamask = ~0x01ffffff;
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else
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sc->sc_dmamask = ~0x07ffffff;
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printf(": dmamask 0x%x", ~sc->sc_dmamask);
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if ((gap->flags & GVP_NOBANK) == 0)
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sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0;
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/*
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* if the user requests a bounce buffer or
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* the users kva space is not ztwo and dma needs it
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* try and allocate a bounce buffer. If we allocate
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* one and it is in ztwo space leave maxdma to user
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* setting or default to MAXPHYS else the address must
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* be on the chip bus so decrease it to either the users
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* setting or 1024 bytes.
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*
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* XXX this needs to change if we move to multiple memory segments.
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*/
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if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) {
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sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS);
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if (isztwomem(sc->sc_dmabuffer))
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printf(" bounce pa 0x%x", kvtop(sc->sc_dmabuffer));
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else if (gtsc_maxdma == 0) {
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gtsc_maxdma = 1024;
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printf(" bounce pa 0x%x",
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PREP_DMA_MEM(sc->sc_dmabuffer));
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}
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}
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if (gtsc_maxdma == 0)
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gtsc_maxdma = MAXPHYS;
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printf(" maxdma %d\n", gtsc_maxdma);
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sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61);
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sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77;
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sbicreset(sc);
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sc->sc_link.adapter_softc = sc;
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sc->sc_link.adapter_target = 7;
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sc->sc_link.adapter = >sc_scsiswitch;
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sc->sc_link.device = >sc_scsidev;
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sc->sc_link.openings = 1;
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TAILQ_INIT(&sc->sc_xslist);
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sc->sc_isr.isr_intr = gtsc_dmaintr;
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sc->sc_isr.isr_arg = sc;
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sc->sc_isr.isr_ipl = 2;
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add_isr(&sc->sc_isr);
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/*
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* attach all scsi units on us
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*/
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config_found(dp, &sc->sc_link, gtscprint);
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}
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/*
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* print diag if pnp is NULL else just extra
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*/
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int
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gtscprint(auxp, pnp)
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void *auxp;
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char *pnp;
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{
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if (pnp == NULL)
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return(UNCONF);
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return(QUIET);
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}
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void
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gtsc_dmafree(dev)
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struct sbic_softc *dev;
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{
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volatile struct sdmac *sdp;
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int s;
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sdp = dev->sc_cregs;
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s = splbio();
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#ifdef DEBUG
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dev->sc_dmatimo = 0;
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#endif
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if (dev->sc_dmacmd) {
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/*
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* clear possible interrupt and stop dma
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*/
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sdp->CNTR &= ~GVP_CNTR_INT_P;
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sdp->SP_DMA = 1;
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dev->sc_dmacmd = 0;
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}
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#ifdef DEBUG
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if (gtsc_debug & (DDB_IO | DDB_FOLLOW))
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printf("gtsc_dmafree\n");
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#endif
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/*
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* disable interrupts
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*/
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sdp->CNTR = 0; /* disable interrupts from dma/sbic */
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dev->sc_flags &= ~SBICF_INTR;
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splx(s);
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}
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int
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gtsc_dmago(dev, addr, count, flags)
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struct sbic_softc *dev;
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char *addr;
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int count, flags;
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{
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volatile struct sdmac *sdp;
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sdp = dev->sc_cregs;
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/*
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* Set up the command word based on flags
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*/
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dev->sc_dmacmd = GVP_CNTR_INTEN;
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if ((flags & DMAGO_READ) == 0)
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dev->sc_dmacmd |= GVP_CNTR_DDIR;
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#ifdef DEBUG
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if (gtsc_debug & DDB_IO)
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printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd);
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dev->sc_dmatimo = 1;
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#endif
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dev->sc_flags |= SBICF_INTR;
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sdp->CNTR = dev->sc_dmacmd;
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sdp->ACR = (u_int) dev->sc_cur->dc_addr;
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if (dev->gtsc_bankmask)
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sdp->bank =
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dev->gtsc_bankmask & (((u_int)dev->sc_cur->dc_addr) >> 18);
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sdp->ST_DMA = 1;
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/*
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* restrict transfer count to maximum
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*/
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if (dev->sc_tcnt > gtsc_maxdma)
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dev->sc_tcnt = gtsc_maxdma;
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return(dev->sc_tcnt);
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}
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void
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gtsc_dmastop(dev)
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struct sbic_softc *dev;
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{
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volatile struct sdmac *sdp;
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int s;
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sdp = dev->sc_cregs;
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#ifdef DEBUG
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if (gtsc_debug & DDB_FOLLOW)
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printf("gtsc_dmastop()\n");
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dev->sc_dmatimo = 0;
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#endif
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if (dev->sc_dmacmd) {
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/*
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* clear possible interrupt and stop dma
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*/
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s = splbio();
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sdp->CNTR &= ~GVP_CNTR_INT_P;
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sdp->SP_DMA = 1;
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dev->sc_dmacmd = 0;
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splx(s);
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}
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}
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int
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gtsc_dmaintr(dev)
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struct sbic_softc *dev;
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{
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volatile struct sdmac *sdp;
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int stat;
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sdp = dev->sc_cregs;
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stat = sdp->CNTR;
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if ((stat & GVP_CNTR_INT_P) == 0)
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return (0);
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#ifdef DEBUG
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if (gtsc_debug & DDB_FOLLOW)
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printf("%s: dmaintr 0x%x\n", dev->sc_dev.dv_xname, stat);
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#endif
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if (dev->sc_flags & SBICF_INTR)
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if (sbicintr(dev))
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return (1);
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return(0);
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}
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int
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gtsc_dmanext(dev)
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struct sbic_softc *dev;
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{
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volatile struct sdmac *sdp;
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int i, stat;
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sdp = dev->sc_cregs;
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if (dev->sc_cur > dev->sc_last) {
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/* shouldn't happen !! */
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printf("gtsc_dmanext at end !!!\n");
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gtsc_dmastop(dev);
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return(0);
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}
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#ifdef DEBUG
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dev->sc_dmatimo = 1;
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#endif
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/*
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* clear possible interrupt and stop dma
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*/
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sdp->CNTR &= ~GVP_CNTR_INT_P;
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sdp->SP_DMA = 1;
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sdp->CNTR = dev->sc_dmacmd;
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sdp->ACR = (u_int) dev->sc_cur->dc_addr;
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if (dev->gtsc_bankmask)
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sdp->bank =
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dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18);
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sdp->ST_DMA = 1;
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dev->sc_tcnt = dev->sc_cur->dc_count << 1;
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if (dev->sc_tcnt > gtsc_maxdma)
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dev->sc_tcnt = gtsc_maxdma;
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#ifdef DEBUG
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if (gtsc_debug & DDB_FOLLOW)
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printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt);
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#endif
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return(dev->sc_tcnt);
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}
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#ifdef DEBUG
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void
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gtsc_dmatimeout(arg)
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void *arg;
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{
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struct sbic_softc *dev;
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int i, s;
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for (i = 0; i < gtsccd.cd_ndevs; i++) {
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dev = gtsccd.cd_devs[i];
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if (dev == NULL)
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continue;
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s = splbio();
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if (dev->sc_dmatimo) {
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if (dev->sc_dmatimo > 1)
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printf("gtsc_dma%d: timeout #%d\n",
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dev->sc_dev.dv_unit, dev->sc_dmatimo - 1);
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dev->sc_dmatimo++;
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}
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splx(s);
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}
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timeout(gtsc_dmatimeout, 0, 30 * hz);
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}
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#endif
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