166 lines
5.3 KiB
C
166 lines
5.3 KiB
C
/* $NetBSD: ahcisata_pci.c,v 1.8 2008/02/29 06:13:39 dyoung Exp $ */
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/*
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* Copyright (c) 2006 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.8 2008/02/29 06:13:39 dyoung Exp $");
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#include <sys/types.h>
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#include <sys/malloc.h>
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/disklabel.h>
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#include <sys/pmf.h>
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#include <uvm/uvm_extern.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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#include <dev/ic/ahcisatavar.h>
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struct ahci_pci_softc {
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struct ahci_softc ah_sc; /* must come first, struct device */
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pci_chipset_tag_t sc_pc;
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pcitag_t sc_pcitag;
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};
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static int ahci_pci_match(struct device *, struct cfdata *, void *);
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static void ahci_pci_attach(struct device *, struct device *, void *);
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static bool ahci_pci_resume(device_t PMF_FN_PROTO);
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CFATTACH_DECL(ahcisata_pci, sizeof(struct ahci_pci_softc),
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ahci_pci_match, ahci_pci_attach, NULL, NULL);
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static int
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ahci_pci_match(struct device *parent, struct cfdata *match,
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void *aux)
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{
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struct pci_attach_args *pa = aux;
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bus_space_tag_t regt;
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bus_space_handle_t regh;
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bus_size_t size;
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int ret = 0;
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
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((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
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PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID)) {
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/* check if the chip is in ahci mode */
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if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
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®t, ®h, NULL, &size) != 0)
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return 0;
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if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA
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&& PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI)
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ret = 3;
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else if (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE)
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ret = 3;
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bus_space_unmap(regt, regh, size);
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return ret;
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}
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return ret;
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}
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static void
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ahci_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct ahci_pci_softc *psc = (struct ahci_pci_softc *)self;
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struct ahci_softc *sc = &psc->ah_sc;
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bus_size_t size;
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char devinfo[256];
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const char *intrstr;
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pci_intr_handle_t intrhandle;
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void *ih;
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if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
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PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
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&sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
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aprint_error("%s: can't map ahci registers\n", AHCINAME(sc));
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return;
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}
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psc->sc_pc = pa->pa_pc;
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psc->sc_pcitag = pa->pa_tag;
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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aprint_naive(": AHCI disk controller\n");
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aprint_normal(": %s\n", devinfo);
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if (pci_intr_map(pa, &intrhandle) != 0) {
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aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, intrhandle);
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ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
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if (ih == NULL) {
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aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
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return;
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}
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aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
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intrstr ? intrstr : "unknown interrupt");
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sc->sc_dmat = pa->pa_dmat;
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if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
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AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
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sc->sc_atac_capflags = ATAC_CAP_RAID;
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} else {
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AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
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}
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ahci_attach(sc);
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if (!pmf_device_register(self, NULL, ahci_pci_resume))
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aprint_error_dev(self, "couldn't establish power handler\n");
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}
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static bool
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ahci_pci_resume(device_t dv PMF_FN_ARGS)
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{
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struct ahci_pci_softc *psc = device_private(dv);
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struct ahci_softc *sc = &psc->ah_sc;
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int s;
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s = splbio();
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ahci_reset(sc);
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ahci_setup_ports(sc);
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ahci_reprobe_drives(sc);
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ahci_enable_intrs(sc);
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splx(s);
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return true;
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}
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