312 lines
8.6 KiB
C
312 lines
8.6 KiB
C
/* $NetBSD: mkclock_isa.c,v 1.5 2002/10/02 15:52:29 thorpej Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Klaus J. Klein.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Mostek MK48T18 time-of-day chip attachment to ISA bus, using two
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* 8-bit ports for address selection and one 8-bit port for data.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: mkclock_isa.c,v 1.5 2002/10/02 15:52:29 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <prep/prep/clockvar.h>
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#include <machine/bus.h>
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#include <machine/residual.h>
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#include <dev/clock_subr.h>
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#include <dev/ic/mk48txxreg.h>
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#include <dev/isa/isavar.h>
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/* Offsets of registers into ISA I/O space */
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#define MKCLOCK_STB0 0 /* Address low */
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#define MKCLOCK_STB1 1 /* Address high */
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#define MKCLOCK_DATA 3 /* Data port */
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#define MKCLOCK_NPORTS (MKCLOCK_DATA - MKCLOCK_STB0 + 1)
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struct mkclock_isa_softc {
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struct device sc_dev; /* Base device */
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bus_space_tag_t sc_iot; /* I/O space access */
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bus_space_handle_t sc_ioh;
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todr_chip_handle_t sc_todr; /* MI todr interface handle */
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};
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/* Autoconfiguration interface */
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int mkclock_isa_match(struct device *, struct cfdata *, void *);
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void mkclock_isa_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(mkclock_isa, sizeof (struct mkclock_isa_softc),
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mkclock_isa_match, mkclock_isa_attach, NULL, NULL);
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/* mk48txx interface */
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uint8_t mkclock_isa_nvrd(bus_space_tag_t, bus_space_handle_t, int);
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void mkclock_isa_nvwr(bus_space_tag_t, bus_space_handle_t, int, uint8_t);
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/* MI todr/PReP clock handling shim */
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void mkclock_isa_init(struct device *);
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void mkclock_isa_get(struct device *, time_t, struct clocktime *);
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void mkclock_isa_set(struct device *, struct clocktime *);
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struct clockfns mkclock_isa_clockfns = {
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mkclock_isa_init, /* cf_init */
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mkclock_isa_get, /* cf_get */
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mkclock_isa_set /* cf_set */
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};
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int
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mkclock_isa_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct isa_attach_args *ia = aux;
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bus_space_handle_t ioh;
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uint8_t csr, ocsr;
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unsigned int t1, t2;
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int found;
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found = 0;
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if (ia->ia_nio < 1 ||
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(ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT &&
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ia->ia_io[0].ir_addr != 0x74))
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return (0);
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if (ia->ia_niomem > 0 &&
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(ia->ia_iomem[0].ir_addr != ISACF_IOMEM_DEFAULT))
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return (0);
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if (ia->ia_nirq > 0 &&
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(ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT))
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return (0);
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if (ia->ia_ndrq > 0 &&
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(ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT))
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return (0);
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if (res->VitalProductData.NvramSize != MK48T18_CLKSZ)
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return (0);
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/*
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* Map I/O space, then try to determine if it's really there.
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*/
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if (bus_space_map(ia->ia_iot, 0x74, MKCLOCK_NPORTS, 0, &ioh))
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return (0);
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/* Supposedly no control bits are set after POST; check for this. */
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ocsr = mkclock_isa_nvrd(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR);
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if (ocsr != 0)
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goto unmap;
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/* Set clock data to read mode, prohibiting updates from clock. */
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csr = ocsr | MK48TXX_CSR_READ;
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mkclock_isa_nvwr(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR, csr);
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/* Compare. */
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if (mkclock_isa_nvrd(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR)
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!= csr)
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goto restore;
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/* Read from the seconds counter. */
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t1 = FROMBCD(mkclock_isa_nvrd(ia->ia_iot, ioh,
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MK48T18_CLKOFF + MK48TXX_ISEC));
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if (t1 > 59)
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goto restore;
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/* Make it tick again, wait, then look again. */
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mkclock_isa_nvwr(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR, ocsr);
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DELAY(1100000);
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mkclock_isa_nvwr(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR, csr);
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t2 = FROMBCD(mkclock_isa_nvrd(ia->ia_iot, ioh,
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MK48T18_CLKOFF + MK48TXX_ISEC));
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if (t2 > 59)
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goto restore;
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#ifdef DEBUG
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printf("mkclock_isa_match: t1 %02d, t2 %02d\n", t1, t2);
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#endif
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/* If [1,2) seconds have passed since, call it a clock. */
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if ((t1 + 1) % 60 == t2 || (t1 + 2) % 60 == t2)
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found = 1;
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restore:
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mkclock_isa_nvwr(ia->ia_iot, ioh, MK48T18_CLKOFF + MK48TXX_ICSR, ocsr);
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unmap:
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bus_space_unmap(ia->ia_iot, ioh, MKCLOCK_NPORTS);
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if (found) {
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ia->ia_nio = 1;
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ia->ia_io[0].ir_addr = 0x74;
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ia->ia_io[0].ir_size = MKCLOCK_NPORTS;
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ia->ia_niomem = 0;
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ia->ia_nirq = 0;
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ia->ia_ndrq = 0;
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}
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return (found);
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}
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void
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mkclock_isa_attach(struct device *parent, struct device *self, void *aux)
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{
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struct isa_attach_args *ia = aux;
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struct mkclock_isa_softc *sc = (struct mkclock_isa_softc *)self;
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/* Map I/O space. */
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sc->sc_iot = ia->ia_iot;
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if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr,
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ia->ia_io[0].ir_size, 0, &sc->sc_ioh))
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panic("mkclock_isa_attach: couldn't map clock I/O space");
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/* Attach to MI mk48txx driver. */
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sc->sc_todr = mk48txx_attach(sc->sc_iot, sc->sc_ioh, "mk48t18", 1900,
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mkclock_isa_nvrd, mkclock_isa_nvwr);
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if (sc->sc_todr == NULL)
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panic("\nmkclock_isa_attach: mk48txx attach failed");
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clockattach(self, &mkclock_isa_clockfns);
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}
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/*
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* Shim to interface mk48txx's MI TODR handling with current PReP structure.
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*/
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void
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mkclock_isa_init(struct device *self)
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{
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/* Nothing to be done. */
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}
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void
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mkclock_isa_get(struct device *self, time_t base, struct clocktime *ct)
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{
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struct mkclock_isa_softc *sc = (struct mkclock_isa_softc *)self;
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struct clock_ymdhms dt;
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struct timeval tv;
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todr_gettime(sc->sc_todr, &tv);
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/* Note: we ignore `tv_usec'. */
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clock_secs_to_ymdhms(tv.tv_sec, &dt);
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ct->year = dt.dt_year - 1900;
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ct->mon = dt.dt_mon;
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ct->day = dt.dt_day;
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ct->hour = dt.dt_hour;
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ct->min = dt.dt_min;
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ct->sec = dt.dt_sec;
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ct->dow = dt.dt_wday;
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}
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void
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mkclock_isa_set(struct device *self, struct clocktime *ct)
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{
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struct mkclock_isa_softc *sc = (struct mkclock_isa_softc *)self;
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struct clock_ymdhms dt;
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struct timeval tv;
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dt.dt_year = ct->year + 1900;
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if (dt.dt_year < 1970)
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dt.dt_year += 100;
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dt.dt_mon = ct->mon;
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dt.dt_day = ct->day;
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dt.dt_wday = ct->dow;
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dt.dt_hour = ct->hour;
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dt.dt_min = ct->min;
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dt.dt_sec = ct->sec;
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tv.tv_sec = clock_ymdhms_to_secs(&dt);
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tv.tv_usec = 0;
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todr_settime(sc->sc_todr, &tv);
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}
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/*
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* Bus access methods for MI mk48txx driver.
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*/
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uint8_t
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mkclock_isa_nvrd(bus_space_tag_t iot, bus_space_handle_t ioh, int off)
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{
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uint8_t datum;
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int s;
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#ifdef DEBUG
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printf("mkclock_isa_nvrd(%d)", off);
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#endif
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s = splclock();
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bus_space_write_1(iot, ioh, MKCLOCK_STB0, off & 0xff);
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bus_space_write_1(iot, ioh, MKCLOCK_STB1, off >> 8);
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datum = bus_space_read_1(iot, ioh, MKCLOCK_DATA);
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splx(s);
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#ifdef DEBUG
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printf(" -> %02x\n", datum);
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#endif
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return (datum);
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}
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void
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mkclock_isa_nvwr(bus_space_tag_t iot, bus_space_handle_t ioh, int off,
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uint8_t datum)
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{
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int s;
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#ifdef DEBUG
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printf("mkclock_isa_nvwr(%d, %02x)\n", off, datum);
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#endif
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s = splclock();
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bus_space_write_1(iot, ioh, MKCLOCK_STB0, off & 0xff);
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bus_space_write_1(iot, ioh, MKCLOCK_STB1, off >> 8);
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bus_space_write_1(iot, ioh, MKCLOCK_DATA, datum);
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splx(s);
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}
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