209 lines
7.5 KiB
C
209 lines
7.5 KiB
C
/* $NetBSD: iomdreg.h,v 1.7 1996/11/23 03:21:43 mark Exp $ */
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/*
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* Copyright (c) 1994 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* iomd.h
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*
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* IOMD registers
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*
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* Created : 18/09/94
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*
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* Based on kate/display/iomd.h
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*/
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#define IOMD_HW_BASE 0x03200000
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#define IOMD_BASE 0xf6000000
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#define IOMD_IOCR (IOMD_BASE + 0x00000000)
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#define IOMD_KBDDAT (IOMD_BASE + 0x00000004)
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#define IOMD_KBDCR (IOMD_BASE + 0x00000008)
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#define IOMD_IRQSTA (IOMD_BASE + 0x00000010)
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#define IOMD_IRQRQA (IOMD_BASE + 0x00000014)
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#define IOMD_IRQMSKA (IOMD_BASE + 0x00000018)
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#define IOMD_SUSPEND (IOMD_BASE + 0x0000001C) /* ARM7500 */
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#define IOMD_IRQSTB (IOMD_BASE + 0x00000020)
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#define IOMD_IRQRQB (IOMD_BASE + 0x00000024)
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#define IOMD_IRQMSKB (IOMD_BASE + 0x00000028)
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#define IOMD_STOP (IOMD_BASE + 0x0000002C) /* ARM7500 */
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#define IOMD_FIQST (IOMD_BASE + 0x00000030)
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#define IOMD_FIQRQ (IOMD_BASE + 0x00000034)
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#define IOMD_FIQMSK (IOMD_BASE + 0x00000038)
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#define IOMD_CLKCTL (IOMD_BASE + 0x0000003C) /* ARM7500 */
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#define IOMD_T0LOW (IOMD_BASE + 0x00000040)
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#define IOMD_T0HIGH (IOMD_BASE + 0x00000044)
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#define IOMD_T0GO (IOMD_BASE + 0x00000048)
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#define IOMD_T0LATCH (IOMD_BASE + 0x0000004c)
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#define IOMD_T1LOW (IOMD_BASE + 0x00000050)
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#define IOMD_T1HIGH (IOMD_BASE + 0x00000054)
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#define IOMD_T1GO (IOMD_BASE + 0x00000058)
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#define IOMD_T1LATCH (IOMD_BASE + 0x0000005c)
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/*
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* For ARM7500, it's not really a IOMD device.
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*/
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#define IOMD_IRQSTC (IOMD_BASE + 0x00000060) /* ARM7500 */
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#define IOMD_IRQRQC (IOMD_BASE + 0x00000064) /* ARM7500 */
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#define IOMD_IRQMSKC (IOMD_BASE + 0x00000068) /* ARM7500 */
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#define IOMD_VIDMUX (IOMD_BASE + 0x0000006C) /* ARM7500 */
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#define IOMD_IRQSTD (IOMD_BASE + 0x00000070) /* ARM7500 */
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#define IOMD_IRQRQD (IOMD_BASE + 0x00000074) /* ARM7500 */
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#define IOMD_IRQMSKD (IOMD_BASE + 0x00000078) /* ARM7500 */
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#define IOMD_ROMCR0 (IOMD_BASE + 0x00000080)
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#define IOMD_ROMCR1 (IOMD_BASE + 0x00000084)
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#ifndef CPU_ARM7500
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#define IOMD_DRAMCR (IOMD_BASE + 0x00000088)
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#define IOMD_VREFCR (IOMD_BASE + 0x0000008c)
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#else
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#define IOMD_REFCR (IOMD_BASE + 0x0000008c) /* ARM7500 */
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#endif /* !CPU_ARM7500 */
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#define IOMD_FSIZE (IOMD_BASE + 0x00000090)
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#define IOMD_ID0 (IOMD_BASE + 0x00000094)
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#define IOMD_ID1 (IOMD_BASE + 0x00000098)
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#define IOMD_VERSION (IOMD_BASE + 0x0000009c)
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#define IOMD_MOUSEX (IOMD_BASE + 0x000000a0)
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#define IOMD_MOUSEY (IOMD_BASE + 0x000000a4)
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#define IOMD_MSDATA (IOMD_BASE + 0x000000a8) /* ARM7500 */
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#define IOMD_MSCR (IOMD_BASE + 0x000000ac) /* ARM7500 */
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#define IOMD_DMATCR (IOMD_BASE + 0x000000c0)
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#define IOMD_IOTCR (IOMD_BASE + 0x000000c4)
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#define IOMD_ECTCR (IOMD_BASE + 0x000000c8)
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#ifndef CPU_ARM7500
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#define IOMD_DMAEXT (IOMD_BASE + 0x000000cc)
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#else
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#define IOMD_ASTCR (IOMD_BASE + 0x000000cc) /* ARM7500 */
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#endif
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#define IOMD_DRAMWID (IOMD_BASE + 0x000000d0) /* ARM7500 */
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#define IOMD_SELFREF (IOMD_BASE + 0x000000d4) /* ARM7500 */
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#define IOMD_ATODICR (IOMD_BASE + 0x000000e0) /* ARM7500 */
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#define IOMD_ATODSR (IOMD_BASE + 0x000000e4) /* ARM7500 */
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#define IOMD_ATODCR (IOMD_BASE + 0x000000e8) /* ARM7500 */
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#define IOMD_ATODCNT1 (IOMD_BASE + 0x000000ec) /* ARM7500 */
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#define IOMD_ATODCNT2 (IOMD_BASE + 0x000000f0) /* ARM7500 */
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#define IOMD_ATODCNT3 (IOMD_BASE + 0x000000f4) /* ARM7500 */
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#define IOMD_ATODCNT4 (IOMD_BASE + 0x000000f8) /* ARM7500 */
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#define IOMD_IO0CURA (IOMD_BASE + 0x00000100)
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#define IOMD_IO0ENDA (IOMD_BASE + 0x00000104)
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#define IOMD_IO0CURB (IOMD_BASE + 0x00000108)
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#define IOMD_IO0ENDB (IOMD_BASE + 0x0000010c)
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#define IOMD_IO0CR (IOMD_BASE + 0x00000110)
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#define IOMD_IO0ST (IOMD_BASE + 0x00000114)
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#define IOMD_IO1CURA (IOMD_BASE + 0x00000120)
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#define IOMD_IO1ENDA (IOMD_BASE + 0x00000124)
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#define IOMD_IO1CURB (IOMD_BASE + 0x00000128)
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#define IOMD_IO1ENDB (IOMD_BASE + 0x0000012c)
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#define IOMD_IO1CR (IOMD_BASE + 0x00000130)
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#define IOMD_IO1ST (IOMD_BASE + 0x00000134)
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#define IOMD_IO2CURA (IOMD_BASE + 0x00000140)
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#define IOMD_IO2ENDA (IOMD_BASE + 0x00000144)
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#define IOMD_IO2CURB (IOMD_BASE + 0x00000148)
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#define IOMD_IO2ENDB (IOMD_BASE + 0x0000014c)
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#define IOMD_IO2CR (IOMD_BASE + 0x00000150)
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#define IOMD_IO2ST (IOMD_BASE + 0x00000154)
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#define IOMD_IO3CURA (IOMD_BASE + 0x00000160)
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#define IOMD_IO3ENDA (IOMD_BASE + 0x00000164)
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#define IOMD_IO3CURB (IOMD_BASE + 0x00000168)
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#define IOMD_IO3ENDB (IOMD_BASE + 0x0000016c)
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#define IOMD_IO3CR (IOMD_BASE + 0x00000170)
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#define IOMD_IO3ST (IOMD_BASE + 0x00000174)
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#define IOMD_SD0CURA (IOMD_BASE + 0x00000180)
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#define IOMD_SD0ENDA (IOMD_BASE + 0x00000184)
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#define IOMD_SD0CURB (IOMD_BASE + 0x00000188)
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#define IOMD_SD0ENDB (IOMD_BASE + 0x0000018c)
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#define IOMD_SD0CR (IOMD_BASE + 0x00000190)
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#define IOMD_SD0ST (IOMD_BASE + 0x00000194)
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#define IOMD_SD1CURA (IOMD_BASE + 0x000001a0)
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#define IOMD_SD1ENDA (IOMD_BASE + 0x000001a4)
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#define IOMD_SD1CURB (IOMD_BASE + 0x000001a8)
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#define IOMD_SD1ENDB (IOMD_BASE + 0x000001ac)
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#define IOMD_SD1CR (IOMD_BASE + 0x000001b0)
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#define IOMD_SD1ST (IOMD_BASE + 0x000001b4)
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#define IOMD_CURSCUR (IOMD_BASE + 0x000001c0)
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#define IOMD_CURSINIT (IOMD_BASE + 0x000001c4)
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#define IOMD_VIDCUR (IOMD_BASE + 0x000001d0)
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#define IOMD_VIDEND (IOMD_BASE + 0x000001d4)
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#define IOMD_VIDSTART (IOMD_BASE + 0x000001d8)
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#define IOMD_VIDINIT (IOMD_BASE + 0x000001dc)
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#define IOMD_VIDCR (IOMD_BASE + 0x000001e0)
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#define IOMD_DMAST (IOMD_BASE + 0x000001f0)
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#define IOMD_DMARQ (IOMD_BASE + 0x000001f4)
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#define IOMD_DMAMSK (IOMD_BASE + 0x000001f8)
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/*
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* Ok these mouse buttons are not strickly part of the iomd but
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* this register is required if the IOMD supports a quadrature mouse
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*/
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#define IO_HW_MOUSE_BUTTONS 0x03210000
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#define IO_MOUSE_BUTTONS 0xf6010000
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#define MOUSE_BUTTON_RIGHT 0x10
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#define MOUSE_BUTTON_MIDDLE 0x20
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#define MOUSE_BUTTON_LEFT 0x40
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#define FREQCON (IOMD_BASE + 0x40000)
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#define RPC600_IOMD_ID 0xd4e7
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#define ARM7500_IOC_ID 0x5b98
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#define IOMD_ID (ReadByte(IOMD_ID0) | (ReadByte(IOMD_ID1) << 8))
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/* End of iomd.h */
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