1441 lines
46 KiB
C++
1441 lines
46 KiB
C++
/* Definitions of target machine for GNU compiler. System/370 version.
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Copyright (C) 1989, 1993, 1995, 1996, 1997 Free Software Foundation, Inc.
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Contributed by Jan Stein (jan@cd.chalmers.se).
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Modified for C/370 MVS by Dave Pitts (dpitts@nyx.cs.du.edu)
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#define TARGET_VERSION printf (" (370/MVS)");
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/* Options for the preprocessor for this target machine. */
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#define CPP_SPEC "-trigraphs"
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/* Names to predefine in the preprocessor for this target machine. */
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#define CPP_PREDEFINES "-DGCC -Dgcc -DMVS -Dmvs -Asystem(mvs) -Acpu(i370) -Amachine(i370)"
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/* Run-time compilation parameters selecting different hardware subsets. */
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extern int target_flags;
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/* The sizes of the code and literals on the current page. */
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extern int mvs_page_code, mvs_page_lit;
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/* The current page number and the base page number for the function. */
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extern int mvs_page_num, function_base_page;
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/* True if a label has been emitted. */
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extern int mvs_label_emitted;
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/* The name of the current function. */
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extern char *mvs_function_name;
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/* The length of the function name malloc'd area. */
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extern int mvs_function_name_length;
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/* The amount of space used for outgoing arguments. */
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extern int current_function_outgoing_args_size;
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/* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
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these are more than twice as fast as load-op-store.
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On 3090 don't use this since load-op-store is much faster. */
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#define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
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/* Default target switches */
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#define TARGET_DEFAULT 1
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/* Macro to define tables used to set the flags. This is a list in braces
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of pairs in braces, each pair being { "NAME", VALUE }
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where VALUE is the bits to set or minus the bits to clear.
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An empty string NAME is used to identify the default VALUE. */
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#define TARGET_SWITCHES \
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{ { "char-instructions", 1}, \
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{ "no-char-instructions", -1}, \
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{ "", TARGET_DEFAULT} }
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/* To use IBM supplied macro function prologue and epilogue, define the
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following to 1. Should only be needed if IBM changes the definition
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of their prologue and epilogue. */
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#define MACROPROLOGUE 0
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#define MACROEPILOGUE 0
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/* Target machine storage layout */
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/* Define this if most significant bit is lowest numbered in instructions
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that operate on numbered bit-fields. */
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#define BITS_BIG_ENDIAN 1
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/* Define this if most significant byte of a word is the lowest numbered. */
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#define BYTES_BIG_ENDIAN 1
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/* Define this if MS word of a multiword is the lowest numbered. */
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#define WORDS_BIG_ENDIAN 1
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/* Number of bits in an addressable storage unit. */
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#define BITS_PER_UNIT 8
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/* Width in bits of a "word", which is the contents of a machine register. */
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#define BITS_PER_WORD 32
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/* Width of a word, in units (bytes). */
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#define UNITS_PER_WORD 4
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/* Width in bits of a pointer. See also the macro `Pmode' defined below. */
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#define POINTER_SIZE 32
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/* Allocation boundary (in *bits*) for storing pointers in memory. */
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#define POINTER_BOUNDARY 32
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY 32
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/* Boundary (in *bits*) on which stack pointer should be aligned. */
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#define STACK_BOUNDARY 32
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/* Allocation boundary (in *bits*) for the code of a function. */
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#define FUNCTION_BOUNDARY 32
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/* There is no point aligning anything to a rounder boundary than this. */
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#define BIGGEST_ALIGNMENT 64
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/* Alignment of field after `int : 0' in a structure. */
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#define EMPTY_FIELD_BOUNDARY 32
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/* Define this if move instructions will actually fail to work when given
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unaligned data. */
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#define STRICT_ALIGNMENT 0
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/* Define target floating point format. */
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#define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
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/* Define character mapping for cross-compiling. */
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#define TARGET_EBCDIC 1
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#ifdef HOST_EBCDIC
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#define MAP_CHARACTER(c) ((char)(c))
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#else
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#define MAP_CHARACTER(c) ((char)mvs_map_char (c))
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#endif
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/* Define maximum length of page minus page escape overhead. */
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#define MAX_MVS_PAGE_LENGTH 4080
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/* Define if special allocation order desired. */
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#define REG_ALLOC_ORDER \
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{ 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
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/* Standard register usage. */
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/* Number of actual hardware registers. The hardware registers are
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assigned numbers for the compiler from 0 to just below
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FIRST_PSEUDO_REGISTER.
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All registers that the compiler knows about must be given numbers,
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even those that are not normally considered general registers.
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For the 370, we give the data registers numbers 0-15,
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and the floating point registers numbers 16-19. */
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#define FIRST_PSEUDO_REGISTER 20
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/* Define base and page registers. */
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#define BASE_REGISTER 3
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#define PAGE_REGISTER 4
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/* 1 for registers that have pervasive standard uses and are not available
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for the register allocator. On the 370 under C/370, R13 is stack (DSA)
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pointer, R12 is the TCA pointer, R3 is the base register, R4 is the page
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origin table pointer and R11 is the arg pointer. */
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#define FIXED_REGISTERS \
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{ 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
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/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
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/* 1 for registers not available across function calls. These must include
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the FIXED_REGISTERS and also any registers that can be used without being
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saved.
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The latter must include the registers where values are returned
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and the register where structure-value addresses are passed.
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NOTE: all floating registers are undefined across calls. */
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#define CALL_USED_REGISTERS \
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{ 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
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/*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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but can be less for certain modes in special long registers. */
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#define HARD_REGNO_NREGS(REGNO, MODE) \
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((REGNO) > 15 ? 1 : (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
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/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
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even registers can hold DI. The floating point registers can hold
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either SF or DF. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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((REGNO) < 16 ? ((REGNO) & 1) == 0 || (MODE) != DImode \
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: (MODE) == SFmode || (MODE) == DFmode)
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/* Value is 1 if it is a good idea to tie two pseudo registers when one has
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mode MODE1 and one has mode MODE2.
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If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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for any hard reg, then this must be 0 for correct output. */
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#define MODES_TIEABLE_P(MODE1, MODE2) \
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(((MODE1) == SFmode || (MODE1) == DFmode) \
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== ((MODE2) == SFmode || (MODE2) == DFmode))
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/* Mark external references. */
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#define ENCODE_SECTION_INFO(decl) \
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if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) \
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SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1;
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/* Specify the registers used for certain standard purposes.
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The values of these macros are register numbers. */
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/* 370 PC isn't overloaded on a register. */
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/* #define PC_REGNUM */
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/* Register to use for pushing function arguments. */
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#define STACK_POINTER_REGNUM 13
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/* Base register for access to local variables of the function. */
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#define FRAME_POINTER_REGNUM 13
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/* Value should be nonzero if functions must have frame pointers.
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Zero means the frame pointer need not be set up (and parms may be
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accessed via the stack pointer) in functions that seem suitable.
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This is computed in `reload', in reload1.c. */
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#define FRAME_POINTER_REQUIRED 1
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/* Base register for access to arguments of the function. */
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#define ARG_POINTER_REGNUM 11
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/* Register in which static-chain is passed to a function. */
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#define STATIC_CHAIN_REGNUM 10
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/* Register in which address to store a structure value is passed to
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a function. */
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#define STRUCT_VALUE_REGNUM 1
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/* Define the classes of registers for register constraints in the
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machine description. Also define ranges of constants.
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One of the classes must always be named ALL_REGS and include all hard regs.
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If there is more than one class, another class must be named NO_REGS
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and contain no registers.
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The name GENERAL_REGS must be the name of a class (or an alias for
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another name such as ALL_REGS). This is the class of registers
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that is allowed by "g" or "r" in a register constraint.
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Also, registers outside this class are allocated only when
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instructions express preferences for them.
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The classes must be numbered in nondecreasing order; that is,
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a larger-numbered class must never be contained completely
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in a smaller-numbered class.
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For any two classes, it is very desirable that there be another
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class that represents their union. */
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enum reg_class
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{
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NO_REGS, ADDR_REGS, DATA_REGS,
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FP_REGS, ALL_REGS, LIM_REG_CLASSES
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};
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#define GENERAL_REGS DATA_REGS
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#define N_REG_CLASSES (int) LIM_REG_CLASSES
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/* Give names of register classes as strings for dump file. */
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#define REG_CLASS_NAMES \
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{ "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
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/* Define which registers fit in which classes. This is an initializer for
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a vector of HARD_REG_SET of length N_REG_CLASSES. */
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#define REG_CLASS_CONTENTS {0, 0x0fffe, 0x0ffff, 0xf0000, 0xfffff}
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/* The same information, inverted:
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Return the class number of the smallest class containing
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reg number REGNO. This could be a conditional expression
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) \
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((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
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/* The class value for index registers, and the one for base regs. */
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#define INDEX_REG_CLASS ADDR_REGS
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#define BASE_REG_CLASS ADDR_REGS
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/* Get reg_class from a letter such as appears in the machine description. */
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#define REG_CLASS_FROM_LETTER(C) \
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((C) == 'a' ? ADDR_REGS : \
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((C) == 'd' ? DATA_REGS : \
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((C) == 'f' ? FP_REGS : NO_REGS)))
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/* The letters I, J, K, L and M in a register constraint string can be used
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to stand for particular ranges of immediate operands.
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This macro defines what the ranges are.
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C is the letter, and VALUE is a constant value.
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Return 1 if VALUE is in the range specified by C. */
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? (unsigned) (VALUE) < 256 : \
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(C) == 'J' ? (unsigned) (VALUE) < 4096 : \
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(C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
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/* Similar, but for floating constants, and defining letters G and H.
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Here VALUE is the CONST_DOUBLE rtx itself. */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
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/* Given an rtx X being reloaded into a reg required to be in class CLASS,
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return the class of reg to actually use. In general this is just CLASS;
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but on some machines in some cases it is preferable to use a more
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restrictive class. */
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#define PREFERRED_RELOAD_CLASS(X, CLASS) \
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(GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
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GET_CODE(X) == CONST_INT ? DATA_REGS : \
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GET_CODE(X) == LABEL_REF || \
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GET_CODE(X) == SYMBOL_REF || \
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GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
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/* Return the maximum number of consecutive registers needed to represent
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mode MODE in a register of class CLASS. */
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#define CLASS_MAX_NREGS(CLASS, MODE) \
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((CLASS) == FP_REGS ? 1 : \
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(GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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/* Stack layout; function entry, exit and calling. */
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/* Define this if pushing a word on the stack makes the stack pointer a
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smaller address. */
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/* #define STACK_GROWS_DOWNWARD */
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/* Define this if the nominal address of the stack frame is at the
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high-address end of the local variables; that is, each additional local
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variable allocated goes at a more negative offset in the frame. */
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/* #define FRAME_GROWS_DOWNWARD */
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/* Offset within stack frame to start allocating local variables at.
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If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
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first local allocated. Otherwise, it is the offset to the BEGINNING
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of the first local allocated. */
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#define STARTING_FRAME_OFFSET \
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(STACK_POINTER_OFFSET + current_function_outgoing_args_size)
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#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
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/* If we generate an insn to push BYTES bytes, this says how many the stack
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pointer really advances by. On the 370, we have no push instruction. */
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/* #define PUSH_ROUNDING(BYTES) */
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/* Accumulate the outgoing argument count so we can request the right
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DSA size and determine stack offset. */
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#define ACCUMULATE_OUTGOING_ARGS
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/* Define offset from stack pointer, to location where a parm can be
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pushed. */
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#define STACK_POINTER_OFFSET 148
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/* Offset of first parameter from the argument pointer register value. */
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#define FIRST_PARM_OFFSET(FNDECL) 0
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/* 1 if N is a possible register number for function argument passing.
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On the 370, no registers are used in this way. */
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#define FUNCTION_ARG_REGNO_P(N) 0
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/* Define a data type for recording info about an argument list during
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the scan of that argument list. This data type should hold all
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necessary information about the function itself and about the args
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processed so far, enough to enable macros such as FUNCTION_ARG to
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determine where the next arg should go. */
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#define CUMULATIVE_ARGS int
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/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
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a function whose data type is FNTYPE.
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For a library call, FNTYPE is 0. */
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
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/* Update the data in CUM to advance over an argument of mode MODE and
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data type TYPE. (TYPE is null for libcalls where that information
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may not be available.) */
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#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
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((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
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? 256 \
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: (MODE) != BLKmode \
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? (GET_MODE_SIZE (MODE) + 3) / 4 \
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: (int_size_in_bytes (TYPE) + 3) / 4))
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/* Define where to put the arguments to a function. Value is zero to push
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the argument on the stack, or a hard register in which to store the
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argument. */
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#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
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/* For an arg passed partly in registers and partly in memory, this is the
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number of registers used. For args passed entirely in registers or
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entirely in memory, zero. */
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#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
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/* Define if returning from a function call automatically pops the
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arguments described by the number-of-args field in the call. */
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#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
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/* Define how to find the value returned by a function. VALTYPE is the
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data type of the value (as a tree).
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If the precise function being called is known, FUNC is its FUNCTION_DECL;
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otherwise, FUNC is 15. */
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#define RET_REG(MODE) ((MODE) == DFmode || (MODE) == SFmode ? 16 : 15)
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/* On the 370 the return value is in R15 or R16. */
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#define FUNCTION_VALUE(VALTYPE, FUNC) \
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gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE)))
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/* Define how to find the value returned by a library function assuming
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the value has mode MODE. */
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#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE))
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/* 1 if N is a possible register number for a function value.
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On the 370 under C/370, R15 and R16 are thus used. */
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#define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
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/* This macro definition sets up a default value for `main' to return. */
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#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
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/* This macro generates the assembly code for function entry.
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All of the C/370 environment is preserved. */
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#define FUNCTION_PROLOGUE(FILE, LSIZE) i370_function_prolog ((FILE), (LSIZE));
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#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
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{ \
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if (strlen (NAME) * 2 > mvs_function_name_length) \
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{ \
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if (mvs_function_name) \
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free (mvs_function_name); \
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mvs_function_name = 0; \
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} \
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|
if (!mvs_function_name) \
|
|
{ \
|
|
mvs_function_name_length = strlen (NAME) * 2; \
|
|
mvs_function_name = (char *) malloc (mvs_function_name_length); \
|
|
if (mvs_function_name == 0) \
|
|
{ \
|
|
fatal ("virtual memory exceeded"); \
|
|
abort (); \
|
|
} \
|
|
} \
|
|
if (!strcmp (NAME, "main")) \
|
|
strcpy (mvs_function_name, "gccmain"); \
|
|
else \
|
|
strcpy (mvs_function_name, NAME); \
|
|
}
|
|
|
|
/* This macro generates the assembly code for function exit, on machines
|
|
that need it. If FUNCTION_EPILOGUE is not defined then individual
|
|
return instructions are generated for each return statement. Args are
|
|
same as for FUNCTION_PROLOGUE.
|
|
|
|
The function epilogue should not depend on the current stack pointer!
|
|
It should use the frame pointer only. This is mandatory because
|
|
of alloca; we also take advantage of it to omit stack adjustments
|
|
before returning. */
|
|
|
|
#if MACROEPILOGUE == 1
|
|
#define FUNCTION_EPILOGUE(FILE, LSIZE) \
|
|
{ \
|
|
int i; \
|
|
check_label_emit(); \
|
|
mvs_check_page (FILE,14,0); \
|
|
fprintf (FILE, "\tEDCEPIL\n"); \
|
|
mvs_page_num++; \
|
|
fprintf (FILE, "\tDS\t0F\n" ); \
|
|
fprintf (FILE, "\tLTORG\n"); \
|
|
fprintf (FILE, "\tDS\t0F\n"); \
|
|
fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
|
|
mvs_free_label(); \
|
|
for ( i = function_base_page; i < mvs_page_num; i++ ) \
|
|
fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
|
|
}
|
|
#else /* MACROEPILOGUE != 1 */
|
|
#define FUNCTION_EPILOGUE(FILE, LSIZE) \
|
|
{ \
|
|
int i; \
|
|
check_label_emit(); \
|
|
mvs_check_page (FILE,14,0); \
|
|
fprintf (FILE, "\tL\t13,4(,13)\n"); \
|
|
fprintf (FILE, "\tL\t14,12(,13)\n"); \
|
|
fprintf (FILE, "\tLM\t2,12,28(13)\n"); \
|
|
fprintf (FILE, "\tBALR\t1,14\n"); \
|
|
fprintf (FILE, "\tDC\tA("); \
|
|
mvs_page_num++; \
|
|
assemble_name (FILE, mvs_function_name); \
|
|
fprintf (FILE, ")\n" ); \
|
|
fprintf (FILE, "\tDS\t0F\n" ); \
|
|
fprintf (FILE, "\tLTORG\n"); \
|
|
fprintf (FILE, "\tDS\t0F\n"); \
|
|
fprintf (FILE, "PGT%d\tEQU\t*\n", function_base_page); \
|
|
mvs_free_label(); \
|
|
for ( i = function_base_page; i < mvs_page_num; i++ ) \
|
|
fprintf (FILE, "\tDC\tA(PG%d)\n", i); \
|
|
}
|
|
#endif /* MACROEPILOGUE */
|
|
|
|
|
|
/* Output assembler code for a block containing the constant parts of a
|
|
trampoline, leaving space for the variable parts.
|
|
|
|
On the 370, the trampoline contains these instructions:
|
|
|
|
BALR 14,0
|
|
USING *,14
|
|
L STATIC_CHAIN_REGISTER,X
|
|
L 15,Y
|
|
BR 15
|
|
X DS 0F
|
|
Y DS 0F */
|
|
|
|
#define TRAMPOLINE_TEMPLATE(FILE) \
|
|
{ \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \
|
|
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \
|
|
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
|
|
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
|
|
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
|
|
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
|
|
}
|
|
|
|
/* Length in units of the trampoline for entering a nested function. */
|
|
|
|
#define TRAMPOLINE_SIZE 20
|
|
|
|
/* Emit RTL insns to initialize the variable parts of a trampoline. */
|
|
|
|
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
|
|
{ \
|
|
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
|
|
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
|
|
}
|
|
|
|
/* Output assembler code to FILE to increment profiler label # LABELNO
|
|
for profiling a function entry. */
|
|
|
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
|
fprintf (FILE, "Error: No profiling available.\n")
|
|
|
|
/* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
|
|
pointer does not matter (provided there is a frame pointer). */
|
|
|
|
#define EXIT_IGNORE_STACK 1
|
|
|
|
/* Addressing modes, and classification of registers for them. */
|
|
|
|
/* #define HAVE_POST_INCREMENT */
|
|
/* #define HAVE_POST_DECREMENT */
|
|
|
|
/* #define HAVE_PRE_DECREMENT */
|
|
/* #define HAVE_PRE_INCREMENT */
|
|
|
|
/* These assume that REGNO is a hard or pseudo reg number. They give
|
|
nonzero only if REGNO is a hard reg of the suitable class or a pseudo
|
|
reg currently allocated to a suitable hard reg.
|
|
These definitions are NOT overridden anywhere. */
|
|
|
|
#define REGNO_OK_FOR_INDEX_P(REGNO) \
|
|
(((REGNO) > 0 && (REGNO) < 16) \
|
|
|| (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
|
|
|
|
#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
|
|
|
|
#define REGNO_OK_FOR_DATA_P(REGNO) \
|
|
((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
|
|
|
|
#define REGNO_OK_FOR_FP_P(REGNO) \
|
|
((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
|
|
|
|
/* Now macros that check whether X is a register and also,
|
|
strictly, whether it is in a specified class. */
|
|
|
|
/* 1 if X is a data register. */
|
|
|
|
#define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
|
|
|
|
/* 1 if X is an fp register. */
|
|
|
|
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
|
|
|
|
/* 1 if X is an address register. */
|
|
|
|
#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
|
|
|
|
/* Maximum number of registers that can appear in a valid memory address. */
|
|
|
|
#define MAX_REGS_PER_ADDRESS 2
|
|
|
|
/* Recognize any constant value that is a valid address. */
|
|
|
|
#define CONSTANT_ADDRESS_P(X) \
|
|
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|
|
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
|
|
|| (GET_CODE (X) == CONST \
|
|
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
|
|
|| (GET_CODE (X) == CONST \
|
|
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
|
|
&& !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
|
|
|
|
/* Nonzero if the constant value X is a legitimate general operand.
|
|
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
|
|
|
#define LEGITIMATE_CONSTANT_P(X) 1
|
|
|
|
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
|
|
its validity for a certain class. We have two alternate definitions
|
|
for each of them. The usual definition accepts all pseudo regs; the
|
|
other rejects them all. The symbol REG_OK_STRICT causes the latter
|
|
definition to be used.
|
|
|
|
Most source files want to accept pseudo regs in the hope that they will
|
|
get allocated to the class that the insn wants them to be in.
|
|
Some source files that are used after register allocation
|
|
need to be strict. */
|
|
|
|
#ifndef REG_OK_STRICT
|
|
|
|
/* Nonzero if X is a hard reg that can be used as an index or if it is
|
|
a pseudo reg. */
|
|
|
|
#define REG_OK_FOR_INDEX_P(X) \
|
|
((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
|
|
|
|
/* Nonzero if X is a hard reg that can be used as a base reg or if it is
|
|
a pseudo reg. */
|
|
|
|
#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
|
|
|
|
#else /* REG_OK_STRICT */
|
|
|
|
/* Nonzero if X is a hard reg that can be used as an index. */
|
|
|
|
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
|
|
|
|
/* Nonzero if X is a hard reg that can be used as a base reg. */
|
|
|
|
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
|
|
|
|
#endif /* REG_OK_STRICT */
|
|
|
|
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
|
valid memory address for an instruction.
|
|
The MODE argument is the machine mode for the MEM expression
|
|
that wants to use this address.
|
|
|
|
The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
|
|
except for CONSTANT_ADDRESS_P which is actually machine-independent. */
|
|
|
|
#define COUNT_REGS(X, REGS, FAIL) \
|
|
if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|
|
REGS += 1; \
|
|
else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
|
|
goto FAIL;
|
|
|
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
|
{ \
|
|
if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|
|
goto ADDR; \
|
|
if (GET_CODE (X) == PLUS) \
|
|
{ \
|
|
int regs = 0; \
|
|
rtx x0 = XEXP (X, 0); \
|
|
rtx x1 = XEXP (X, 1); \
|
|
if (GET_CODE (x0) == PLUS) \
|
|
{ \
|
|
COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
|
|
COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
|
|
COUNT_REGS (x1, regs, FAIL); \
|
|
if (regs == 2) \
|
|
goto ADDR; \
|
|
} \
|
|
else if (GET_CODE (x1) == PLUS) \
|
|
{ \
|
|
COUNT_REGS (x0, regs, FAIL); \
|
|
COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
|
|
COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
|
|
if (regs == 2) \
|
|
goto ADDR; \
|
|
} \
|
|
else \
|
|
{ \
|
|
COUNT_REGS (x0, regs, FAIL); \
|
|
COUNT_REGS (x1, regs, FAIL); \
|
|
if (regs != 0) \
|
|
goto ADDR; \
|
|
} \
|
|
} \
|
|
FAIL: ; \
|
|
}
|
|
|
|
/* The 370 has no mode dependent addresses. */
|
|
|
|
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
|
|
|
|
/* Try machine-dependent ways of modifying an illegitimate address
|
|
to be legitimate. If we find one, return the new, valid address.
|
|
This macro is used in only one place: `memory_address' in explow.c. */
|
|
|
|
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
|
{ \
|
|
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
|
|
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
|
|
copy_to_mode_reg (SImode, XEXP (X, 1))); \
|
|
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
|
|
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
|
|
copy_to_mode_reg (SImode, XEXP (X, 0))); \
|
|
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
|
|
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
|
|
force_operand (XEXP (X, 0), 0)); \
|
|
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
|
|
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
|
|
force_operand (XEXP (X, 1), 0)); \
|
|
if (memory_address_p (MODE, X)) \
|
|
goto WIN; \
|
|
}
|
|
|
|
/* Specify the machine mode that this machine uses for the index in the
|
|
tablejump instruction. */
|
|
|
|
#define CASE_VECTOR_MODE SImode
|
|
|
|
/* Define as C expression which evaluates to nonzero if the tablejump
|
|
instruction expects the table to contain offsets from the address of the
|
|
table.
|
|
Do not define this if the table should contain absolute addresses. */
|
|
/* #define CASE_VECTOR_PC_RELATIVE 1 */
|
|
|
|
/* Specify the tree operation to be used to convert reals to integers. */
|
|
|
|
#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
|
|
|
|
/* Define this if fixuns_trunc is the same as fix_trunc. */
|
|
|
|
#define FIXUNS_TRUNC_LIKE_FIX_TRUNC
|
|
|
|
/* We use "unsigned char" as default. */
|
|
|
|
#define DEFAULT_SIGNED_CHAR 0
|
|
|
|
/* This is the kind of divide that is easiest to do in the general case. */
|
|
|
|
#define EASY_DIV_EXPR TRUNC_DIV_EXPR
|
|
|
|
/* Max number of bytes we can move from memory to memory in one reasonably
|
|
fast instruction. */
|
|
|
|
#define MOVE_MAX 256
|
|
|
|
/* Define this if zero-extension is slow (more than one real instruction). */
|
|
|
|
#define SLOW_ZERO_EXTEND
|
|
|
|
/* Nonzero if access to memory by bytes is slow and undesirable. */
|
|
|
|
#define SLOW_BYTE_ACCESS 1
|
|
|
|
/* Define if shifts truncate the shift count which implies one can omit
|
|
a sign-extension or zero-extension of a shift count. */
|
|
|
|
/* #define SHIFT_COUNT_TRUNCATED */
|
|
|
|
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
|
is done just by pretending it is already truncated. */
|
|
|
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
|
|
|
|
/* We assume that the store-condition-codes instructions store 0 for false
|
|
and some other value for true. This is the value stored for true. */
|
|
|
|
/* #define STORE_FLAG_VALUE -1 */
|
|
|
|
/* When a prototype says `char' or `short', really pass an `int'. */
|
|
|
|
#define PROMOTE_PROTOTYPES
|
|
|
|
/* Don't perform CSE on function addresses. */
|
|
|
|
#define NO_FUNCTION_CSE
|
|
|
|
/* Specify the machine mode that pointers have.
|
|
After generation of rtl, the compiler makes no further distinction
|
|
between pointers and any other objects of this machine mode. */
|
|
|
|
#define Pmode SImode
|
|
|
|
/* A function address in a call instruction is a byte address (for
|
|
indexing purposes) so give the MEM rtx a byte's mode. */
|
|
|
|
#define FUNCTION_MODE QImode
|
|
|
|
/* Compute the cost of computing a constant rtl expression RTX whose
|
|
rtx-code is CODE. The body of this macro is a portion of a switch
|
|
statement. If the code is computed here, return it with a return
|
|
statement. Otherwise, break from the switch. */
|
|
|
|
#define CONST_COSTS(RTX, CODE, OUTERCODE) \
|
|
case CONST_INT: \
|
|
if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
|
|
case CONST: \
|
|
case LABEL_REF: \
|
|
case SYMBOL_REF: \
|
|
return 2; \
|
|
case CONST_DOUBLE: \
|
|
return 4;
|
|
|
|
/* Tell final.c how to eliminate redundant test instructions. */
|
|
|
|
/* Here we define machine-dependent flags and fields in cc_status
|
|
(see `conditions.h'). */
|
|
|
|
/* Store in cc_status the expressions that the condition codes will
|
|
describe after execution of an instruction whose pattern is EXP.
|
|
Do not alter them if the instruction would not alter the cc's.
|
|
|
|
On the 370, load insns do not alter the cc's. However, in some
|
|
cases these instructions can make it possibly invalid to use the
|
|
saved cc's. In those cases we clear out some or all of the saved
|
|
cc's so they won't be used. */
|
|
|
|
#define NOTICE_UPDATE_CC(EXP, INSN) \
|
|
{ \
|
|
rtx exp = (EXP); \
|
|
if (GET_CODE (exp) == PARALLEL) /* Check this */ \
|
|
exp = XVECEXP (exp, 0, 0); \
|
|
if (GET_CODE (exp) != SET) \
|
|
CC_STATUS_INIT; \
|
|
else \
|
|
{ \
|
|
if (XEXP (exp, 0) == cc0_rtx) \
|
|
{ \
|
|
cc_status.value1 = XEXP (exp, 0); \
|
|
cc_status.value2 = XEXP (exp, 1); \
|
|
cc_status.flags = 0; \
|
|
} \
|
|
else \
|
|
{ \
|
|
if (cc_status.value1 \
|
|
&& reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
|
|
cc_status.value1 = 0; \
|
|
if (cc_status.value2 \
|
|
&& reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
|
|
cc_status.value2 = 0; \
|
|
switch (GET_CODE (XEXP (exp, 1))) \
|
|
{ \
|
|
case PLUS: case MINUS: case MULT: /* case UMULT: */ \
|
|
case DIV: case UDIV: case NEG: case ASHIFT: \
|
|
case ASHIFTRT: case AND: case IOR: case XOR: \
|
|
case ABS: case NOT: \
|
|
CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
|
|
} \
|
|
} \
|
|
} \
|
|
}
|
|
|
|
|
|
#define CC_STATUS_SET(V1, V2) \
|
|
{ \
|
|
cc_status.flags = 0; \
|
|
cc_status.value1 = (V1); \
|
|
cc_status.value2 = (V2); \
|
|
if (cc_status.value1 \
|
|
&& reg_mentioned_p (cc_status.value1, cc_status.value2)) \
|
|
cc_status.value2 = 0; \
|
|
}
|
|
|
|
#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
|
|
{ if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
|
|
|
|
/* Control the assembler format that we output. */
|
|
|
|
#define TEXT_SECTION_ASM_OP "* Program text area"
|
|
#define DATA_SECTION_ASM_OP "* Program data area"
|
|
#define INIT_SECTION_ASM_OP "* Program initialization area"
|
|
#define CTOR_LIST_BEGIN /* NO OP */
|
|
#define CTOR_LIST_END /* NO OP */
|
|
|
|
/* How to refer to registers in assembler output. This sequence is
|
|
indexed by compiler's hard-register-number (see above). */
|
|
|
|
#define REGISTER_NAMES \
|
|
{ "0", "1", "2", "3", "4", "5", "6", "7", \
|
|
"8", "9", "10", "11", "12", "13", "14", "15", \
|
|
"0", "2", "4", "6" \
|
|
}
|
|
|
|
/* How to renumber registers for dbx and gdb. */
|
|
|
|
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
|
|
|
|
#define ASM_FILE_START(FILE) fputs ("\tCSECT\n", FILE);
|
|
#define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
|
|
#define ASM_IDENTIFY_GCC(FILE)
|
|
#define ASM_COMMENT_START "*"
|
|
#define ASM_APP_OFF ""
|
|
#define ASM_APP_ON ""
|
|
|
|
#define ASM_OUTPUT_LABEL(FILE, NAME) \
|
|
{ assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
|
|
|
|
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) /* NO OP */
|
|
|
|
#define ASM_GLOBALIZE_LABEL(FILE, NAME) \
|
|
{ fputs ("\tENTRY\t", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE); }
|
|
|
|
/* MVS externals are limited to 8 characters, upper case only.
|
|
The '_' is mapped to '@', except for MVS functions, then '#'. */
|
|
|
|
#define MAX_MVS_LABEL_SIZE 8
|
|
|
|
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
|
|
{ \
|
|
char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
|
|
if (strlen (NAME) > MAX_MVS_LABEL_SIZE) \
|
|
{ \
|
|
strncpy (temp, NAME, MAX_MVS_LABEL_SIZE); \
|
|
temp[MAX_MVS_LABEL_SIZE] = '\0'; \
|
|
} \
|
|
else \
|
|
strcpy (temp,NAME); \
|
|
if (!strcmp (temp,"main")) \
|
|
strcpy (temp,"gccmain"); \
|
|
if (mvs_function_check (temp)) \
|
|
ch = '#'; \
|
|
else \
|
|
ch = '@'; \
|
|
for (bp = temp; *bp; bp++) \
|
|
{ \
|
|
if (islower (*bp)) *bp = toupper (*bp); \
|
|
if (*bp == '_') *bp = ch; \
|
|
} \
|
|
fprintf (FILE, "%s", temp); \
|
|
}
|
|
|
|
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
|
|
sprintf (LABEL, "*%s%d", PREFIX, NUM)
|
|
|
|
/* Generate internal label. Since we can branch here from off page, we
|
|
must reload the base register. */
|
|
|
|
#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
|
|
{ \
|
|
if (!strcmp (PREFIX,"L")) \
|
|
{ \
|
|
mvs_add_label(NUM); \
|
|
mvs_label_emitted = 1; \
|
|
} \
|
|
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
|
|
}
|
|
|
|
/* Generate case label. */
|
|
|
|
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
|
|
fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
|
|
|
|
/* This is how to output an element of a case-vector that is absolute. */
|
|
|
|
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
|
mvs_check_page (FILE, 4, 0); \
|
|
fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
|
|
|
|
/* This is how to output an element of a case-vector that is relative. */
|
|
|
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
|
mvs_check_page (FILE, 4, 0); \
|
|
fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
|
|
|
|
/* This is how to output an insn to push a register on the stack.
|
|
It need not be very fast code. */
|
|
|
|
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
|
|
mvs_check_page (FILE, 8, 4); \
|
|
fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
|
|
reg_names[REGNO], STACK_POINTER_OFFSET)
|
|
|
|
/* This is how to output an insn to pop a register from the stack.
|
|
It need not be very fast code. */
|
|
|
|
#define ASM_OUTPUT_REG_POP(FILE, REGNO) \
|
|
mvs_check_page (FILE, 8, 0); \
|
|
fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
|
|
reg_names[REGNO], STACK_POINTER_OFFSET)
|
|
|
|
/* This is how to output an assembler line defining a `double' constant. */
|
|
|
|
#define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
|
|
fprintf (FILE, "\tDC\tD'%.18G'\n", (VALUE))
|
|
|
|
/* This is how to output an assembler line defining a `float' constant. */
|
|
|
|
#define ASM_OUTPUT_FLOAT(FILE, VALUE) \
|
|
fprintf (FILE, "\tDC\tE'%.9G'\n", (VALUE))
|
|
|
|
/* This outputs an integer, if not a CONST_INT must be address constant. */
|
|
|
|
#define ASM_OUTPUT_INT(FILE, EXP) \
|
|
{ \
|
|
if (GET_CODE (EXP) == CONST_INT) \
|
|
{ \
|
|
fprintf (FILE, "\tDC\tF'"); \
|
|
output_addr_const (FILE, EXP); \
|
|
fprintf (FILE, "'\n"); \
|
|
} \
|
|
else \
|
|
{ \
|
|
fprintf (FILE, "\tDC\tA("); \
|
|
output_addr_const (FILE, EXP); \
|
|
fprintf (FILE, ")\n"); \
|
|
} \
|
|
}
|
|
|
|
/* This outputs a short integer. */
|
|
|
|
#define ASM_OUTPUT_SHORT(FILE, EXP) \
|
|
{ \
|
|
fprintf (FILE, "\tDC\tX'%04X'\n", INTVAL(EXP) & 0xFFFF); \
|
|
}
|
|
|
|
/* This outputs a byte sized integer. */
|
|
|
|
#define ASM_OUTPUT_CHAR(FILE, EXP) \
|
|
fprintf (FILE, "\tDC\tX'%02X'\n", INTVAL (EXP) )
|
|
|
|
#define ASM_OUTPUT_BYTE(FILE, VALUE) \
|
|
fprintf (FILE, "\tDC\tX'%02X'\n", VALUE)
|
|
|
|
/* This outputs a text string. The string are chopped up to fit into
|
|
an 80 byte record. Also, control and special characters, interpreted
|
|
by the IBM assembler, are output numerically. */
|
|
|
|
#define MVS_ASCII_TEXT_LENGTH 48
|
|
|
|
#define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
|
|
{ \
|
|
int i, j; \
|
|
int c; \
|
|
for (j = 0, i = 0; i < LEN; j++, i++) \
|
|
{ \
|
|
c = PTR[i]; \
|
|
if (iscntrl (c) || c == '&') \
|
|
{ \
|
|
if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
|
|
fprintf (FILE, "'\n"); \
|
|
j = -1; \
|
|
if (c == '&') c = MAP_CHARACTER (c); \
|
|
fprintf (FILE, "\tDC\tX'%X'\n", c ); \
|
|
} \
|
|
else \
|
|
{ \
|
|
if (j % MVS_ASCII_TEXT_LENGTH == 0) \
|
|
fprintf (FILE, "\tDC\tC'"); \
|
|
if ( c == '\'' ) \
|
|
fprintf (FILE, "%c%c", c, c); \
|
|
else \
|
|
fprintf (FILE, "%c", c); \
|
|
if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
|
|
fprintf (FILE, "'\n" ); \
|
|
} \
|
|
} \
|
|
if (j % MVS_ASCII_TEXT_LENGTH != 0) \
|
|
fprintf (FILE, "'\n"); \
|
|
}
|
|
|
|
/* This is how to output an assembler line that says to advance the
|
|
location counter to a multiple of 2**LOG bytes. */
|
|
|
|
#define ASM_OUTPUT_ALIGN(FILE, LOG) \
|
|
if (LOG) \
|
|
{ \
|
|
if ((LOG) == 1) \
|
|
fprintf (FILE, "\tDS\t0H\n" ); \
|
|
else \
|
|
fprintf (FILE, "\tDS\t0F\n" ); \
|
|
} \
|
|
|
|
/* The maximum length of memory that the IBM assembler will allow in one
|
|
DS operation. */
|
|
|
|
#define MAX_CHUNK 32767
|
|
|
|
/* A C statement to output to the stdio stream FILE an assembler
|
|
instruction to advance the location counter by SIZE bytes. Those
|
|
bytes should be zero when loaded. */
|
|
|
|
#define ASM_OUTPUT_SKIP(FILE, SIZE) \
|
|
{ \
|
|
int s, k; \
|
|
for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
|
|
{ \
|
|
if (s > MAX_CHUNK) \
|
|
k = MAX_CHUNK; \
|
|
else \
|
|
k = s; \
|
|
fprintf (FILE, "\tDS\tXL%d\n", k); \
|
|
} \
|
|
}
|
|
|
|
/* A C statement (sans semicolon) to output to the stdio stream
|
|
FILE the assembler definition of a common-label named NAME whose
|
|
size is SIZE bytes. The variable ROUNDED is the size rounded up
|
|
to whatever alignment the caller wants. */
|
|
|
|
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
|
|
{ \
|
|
fputs ("\tENTRY\t", FILE); \
|
|
assemble_name (FILE, NAME); \
|
|
fputs ("\n", FILE); \
|
|
fprintf (FILE, "\tDS\t0F\n"); \
|
|
ASM_OUTPUT_LABEL (FILE,NAME); \
|
|
ASM_OUTPUT_SKIP (FILE,SIZE); \
|
|
}
|
|
|
|
/* A C statement (sans semicolon) to output to the stdio stream
|
|
FILE the assembler definition of a local-common-label named NAME
|
|
whose size is SIZE bytes. The variable ROUNDED is the size
|
|
rounded up to whatever alignment the caller wants. */
|
|
|
|
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
|
|
{ \
|
|
fprintf (FILE, "\tDS\t0F\n"); \
|
|
ASM_OUTPUT_LABEL (FILE,NAME); \
|
|
ASM_OUTPUT_SKIP (FILE,SIZE); \
|
|
}
|
|
|
|
/* Store in OUTPUT a string (made with alloca) containing an
|
|
assembler-name for a local static variable named NAME.
|
|
LABELNO is an integer which is different for each call. */
|
|
|
|
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
|
|
{ \
|
|
(OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
|
|
sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
|
|
}
|
|
|
|
/* Define the parentheses used to group arithmetic operations
|
|
in assembler code. */
|
|
|
|
#define ASM_OPEN_PAREN "("
|
|
#define ASM_CLOSE_PAREN ")"
|
|
|
|
/* Define results of standard character escape sequences. */
|
|
|
|
#define TARGET_BELL 47
|
|
#define TARGET_BS 22
|
|
#define TARGET_TAB 5
|
|
#define TARGET_NEWLINE 21
|
|
#define TARGET_VT 11
|
|
#define TARGET_FF 12
|
|
#define TARGET_CR 13
|
|
|
|
/* Print operand X (an rtx) in assembler syntax to file FILE.
|
|
CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
|
For `%' followed by punctuation, CODE is the punctuation and X is null. */
|
|
|
|
#define PRINT_OPERAND(FILE, X, CODE) \
|
|
{ \
|
|
switch (GET_CODE (X)) \
|
|
{ \
|
|
static char curreg[4]; \
|
|
case REG: \
|
|
if (CODE == 'N') \
|
|
strcpy (curreg, reg_names[REGNO (X) + 1]); \
|
|
else \
|
|
strcpy (curreg, reg_names[REGNO (X)]); \
|
|
fprintf (FILE, "%s", curreg); \
|
|
break; \
|
|
case MEM: \
|
|
{ \
|
|
rtx addr = XEXP (X, 0); \
|
|
if (CODE == 'O') \
|
|
{ \
|
|
if (GET_CODE (addr) == PLUS) \
|
|
fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
|
|
else \
|
|
fprintf (FILE, "0"); \
|
|
} \
|
|
else if (CODE == 'R') \
|
|
{ \
|
|
if (GET_CODE (addr) == PLUS) \
|
|
fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
|
|
else \
|
|
fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
|
|
} \
|
|
else \
|
|
output_address (XEXP (X, 0)); \
|
|
} \
|
|
break; \
|
|
case SYMBOL_REF: \
|
|
case LABEL_REF: \
|
|
mvs_page_lit += 4; \
|
|
if (SYMBOL_REF_FLAG (X)) fprintf (FILE, "=V("); \
|
|
else fprintf (FILE, "=A("); \
|
|
output_addr_const (FILE, X); \
|
|
fprintf (FILE, ")"); \
|
|
break; \
|
|
case CONST_INT: \
|
|
if (CODE == 'B') \
|
|
fprintf (FILE, "%d", INTVAL (X) & 0xff); \
|
|
else if (CODE == 'X') \
|
|
fprintf (FILE, "%02X", INTVAL (X) & 0xff); \
|
|
else if (CODE == 'h') \
|
|
fprintf (FILE, "%d", (INTVAL (X) << 16) >> 16); \
|
|
else if (CODE == 'H') \
|
|
{ \
|
|
mvs_page_lit += 2; \
|
|
fprintf (FILE, "=H'%d'", (INTVAL (X) << 16) >> 16); \
|
|
} \
|
|
else \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
fprintf (FILE, "=F'%d'", INTVAL (X)); \
|
|
} \
|
|
break; \
|
|
case CONST_DOUBLE: \
|
|
if (GET_MODE (X) == DImode) \
|
|
{ \
|
|
if (CODE == 'M') \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (X)); \
|
|
} \
|
|
else if (CODE == 'L') \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (X)); \
|
|
} \
|
|
else \
|
|
{ \
|
|
mvs_page_lit += 8; \
|
|
fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (X), \
|
|
CONST_DOUBLE_HIGH (X)); \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
union { double d; int i[2]; } u; \
|
|
u.i[0] = CONST_DOUBLE_LOW (X); \
|
|
u.i[1] = CONST_DOUBLE_HIGH (X); \
|
|
if (GET_MODE (X) == SFmode) \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
fprintf (FILE, "=E'%.9G'", u.d); \
|
|
} \
|
|
else \
|
|
{ \
|
|
mvs_page_lit += 8; \
|
|
fprintf (FILE, "=D'%.18G'", u.d); \
|
|
} \
|
|
} \
|
|
break; \
|
|
case CONST: \
|
|
if (GET_CODE (XEXP (X, 0)) == PLUS \
|
|
&& GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
if (SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))) \
|
|
{ \
|
|
fprintf (FILE, "=V("); \
|
|
ASM_OUTPUT_LABELREF (FILE, \
|
|
XSTR (XEXP (XEXP (X, 0), 0), 0)); \
|
|
fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
|
|
INTVAL (XEXP (XEXP (X, 0), 1))); \
|
|
} \
|
|
else \
|
|
{ \
|
|
fprintf (FILE, "=A("); \
|
|
output_addr_const (FILE, X); \
|
|
fprintf (FILE, ")"); \
|
|
} \
|
|
} \
|
|
else \
|
|
{ \
|
|
mvs_page_lit += 4; \
|
|
fprintf (FILE, "=F'"); \
|
|
output_addr_const (FILE, X); \
|
|
fprintf (FILE, "'"); \
|
|
} \
|
|
break; \
|
|
default: \
|
|
abort(); \
|
|
} \
|
|
}
|
|
|
|
#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
|
{ \
|
|
rtx breg, xreg, offset, plus; \
|
|
\
|
|
switch (GET_CODE (ADDR)) \
|
|
{ \
|
|
case REG: \
|
|
fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
|
|
break; \
|
|
case PLUS: \
|
|
breg = 0; \
|
|
xreg = 0; \
|
|
offset = 0; \
|
|
if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
|
|
{ \
|
|
if (GET_CODE (XEXP (ADDR, 1)) == REG) \
|
|
breg = XEXP (ADDR, 1); \
|
|
else \
|
|
offset = XEXP (ADDR, 1); \
|
|
plus = XEXP (ADDR, 0); \
|
|
} \
|
|
else \
|
|
{ \
|
|
if (GET_CODE (XEXP (ADDR, 0)) == REG) \
|
|
breg = XEXP (ADDR, 0); \
|
|
else \
|
|
offset = XEXP (ADDR, 0); \
|
|
plus = XEXP (ADDR, 1); \
|
|
} \
|
|
if (GET_CODE (plus) == PLUS) \
|
|
{ \
|
|
if (GET_CODE (XEXP (plus, 0)) == REG) \
|
|
{ \
|
|
if (breg) \
|
|
xreg = XEXP (plus, 0); \
|
|
else \
|
|
breg = XEXP (plus, 0); \
|
|
} \
|
|
else \
|
|
{ \
|
|
offset = XEXP (plus, 0); \
|
|
} \
|
|
if (GET_CODE (XEXP (plus, 1)) == REG) \
|
|
{ \
|
|
if (breg) \
|
|
xreg = XEXP (plus, 1); \
|
|
else \
|
|
breg = XEXP (plus, 1); \
|
|
} \
|
|
else \
|
|
{ \
|
|
offset = XEXP (plus, 1); \
|
|
} \
|
|
} \
|
|
else if (GET_CODE (plus) == REG) \
|
|
{ \
|
|
if (breg) \
|
|
xreg = plus; \
|
|
else \
|
|
breg = plus; \
|
|
} \
|
|
else \
|
|
{ \
|
|
offset = plus; \
|
|
} \
|
|
if (offset) \
|
|
{ \
|
|
if (GET_CODE (offset) == LABEL_REF) \
|
|
fprintf (FILE, "L%d", \
|
|
CODE_LABEL_NUMBER (XEXP (offset, 0))); \
|
|
else \
|
|
output_addr_const (FILE, offset); \
|
|
} \
|
|
else \
|
|
fprintf (FILE, "0"); \
|
|
if (xreg) \
|
|
fprintf (FILE, "(%s,%s)", \
|
|
reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
|
|
else \
|
|
fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
|
|
break; \
|
|
default: \
|
|
mvs_page_lit += 4; \
|
|
if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
|
|
else fprintf (FILE, "=A("); \
|
|
output_addr_const (FILE, ADDR); \
|
|
fprintf (FILE, ")"); \
|
|
break; \
|
|
} \
|
|
}
|