199 lines
5.4 KiB
C
199 lines
5.4 KiB
C
/* $NetBSD: sb_ofisa.c,v 1.5 1999/03/30 20:07:56 thorpej Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/midi_if.h>
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#include <dev/mulaw.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/isa/isavar.h>
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#include <dev/ofisa/ofisavar.h>
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#include <dev/isa/sbreg.h>
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#include <dev/isa/sbvar.h>
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#include <dev/isa/sbdspvar.h>
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int sb_ofisa_match __P((struct device *, struct cfdata *, void *));
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void sb_ofisa_attach __P((struct device *, struct device *, void *));
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struct cfattach sb_ofisa_ca = {
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sizeof(struct sbdsp_softc), sb_ofisa_match, sb_ofisa_attach
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};
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int
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sb_ofisa_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct ofisa_attach_args *aa = aux;
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const char *compatible_strings[] = {
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"pnpPNP,b000", /* generic SB 1.5 */
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"pnpPNP,b001", /* generic SB 2.0 */
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"pnpPNP,b002", /* generic SB Pro */
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"pnpPNP,b003", /* generic SB 16 */
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NULL,
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};
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int rv = 0;
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if (of_compatible(aa->oba.oba_phandle, compatible_strings) != -1) {
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/*
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* Use a low match priority so that a more specific driver
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* can match, e.g. a native ESS driver.
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*/
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rv = 1;
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}
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return (rv);
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}
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void
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sb_ofisa_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct sbdsp_softc *sc = (void *)self;
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struct ofisa_attach_args *aa = aux;
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struct ofisa_reg_desc reg;
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struct ofisa_intr_desc intr;
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struct ofisa_dma_desc dma[2];
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int n, ndrq;
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char *model;
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/*
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* We're living on an OFW. We have to ask the OFW what our
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* registers and interrupts properties look like.
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*
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* We expect:
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*
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* 1 i/o register region
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* 1 interrupt
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* 1 or 2 dma channels
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*/
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n = ofisa_reg_get(aa->oba.oba_phandle, ®, 1);
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if (n != 1) {
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printf(": error getting register data\n");
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return;
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}
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if (reg.type != OFISA_REG_TYPE_IO) {
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printf(": register type not i/o\n");
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return;
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}
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if (reg.len != SB_NPORT && reg.len != SBP_NPORT) {
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printf(": weird register size (%lu, expected %d or %d)\n",
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(unsigned long)reg.len, SB_NPORT, SBP_NPORT);
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return;
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}
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n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1);
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if (n != 1) {
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printf(": error getting interrupt data\n");
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return;
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}
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ndrq = ofisa_dma_get(aa->oba.oba_phandle, dma, 2);
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if (ndrq != 1 && ndrq != 2) {
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printf(": error getting DMA data\n");
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return;
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}
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sc->sc_ic = aa->ic;
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sc->sc_iot = aa->iot;
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if (bus_space_map(sc->sc_iot, reg.addr, reg.len, 0, &sc->sc_ioh)) {
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printf(": unable to map register space\n");
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return;
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}
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/* XXX These are only for setting chip configuration registers. */
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sc->sc_iobase = reg.addr;
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sc->sc_irq = intr.irq;
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sc->sc_drq8 = DRQUNK;
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sc->sc_drq16 = DRQUNK;
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for (n = 0; n < ndrq; n++) {
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/* XXX check mode? */
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switch (dma[n].width) {
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case 8:
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if (sc->sc_drq8 == DRQUNK)
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sc->sc_drq8 = dma[n].drq;
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break;
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case 16:
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if (sc->sc_drq16 == DRQUNK)
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sc->sc_drq16 = dma[n].drq;
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break;
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default:
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printf(": weird DMA width %d\n", dma[n].width);
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return;
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}
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}
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if (sc->sc_drq8 == DRQUNK) {
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printf(": no 8-bit DMA channel\n");
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return;
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}
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if (sbmatch(sc) == 0) {
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printf(": sbmatch failed\n");
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return;
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}
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sc->sc_ih = isa_intr_establish(aa->ic, intr.irq, IST_EDGE, IPL_AUDIO,
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sbdsp_intr, sc);
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n = OF_getproplen(aa->oba.oba_phandle, "model");
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if (n > 0) {
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model = alloca(n);
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if (OF_getprop(aa->oba.oba_phandle, "model", model, n) == n)
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printf(": %s\n%s", model, sc->sc_dev.dv_xname);
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}
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sbattach(sc);
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}
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