0bc69b6498
and move them in their proper places. Move the BRI registry from layer 2 (duh!) to layer 4, so active cards (which don't have layer 3 or layer 2 in their driver). Remove all remaining hard coded controller and driver types. Remove any arbitrary hard coded limits, at least those that show up in the internal API. This fixes PR 15950.
540 lines
15 KiB
C
540 lines
15 KiB
C
/*
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* Copyright (c) 1997, 1999 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_drn_ngo.c - Dr. Neuhaus Niccy GO@ and SAGEM Cybermod
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* --------------------------------------------------------
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*
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* $Id: isic_isapnp_drn_ngo.c,v 1.4 2002/03/24 20:35:50 martin Exp $
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*
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* last edit-date: [Fri Jan 5 11:38:29 2001]
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*
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*---------------------------------------------------------------------------*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isic_isapnp_drn_ngo.c,v 1.4 2002/03/24 20:35:50 martin Exp $");
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#include "opt_isicpnp.h"
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#ifdef ISICPNP_DRN_NGO
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#include <sys/param.h>
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#if defined(__FreeBSD__) && __FreeBSD__ >= 3
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#include <sys/ioccom.h>
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#else
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#include <sys/ioctl.h>
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#endif
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000
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#include <sys/callout.h>
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#endif
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#include <i386/isa/isa_device.h>
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#else
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#include <machine/bus.h>
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#include <sys/device.h>
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#endif
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#include <sys/socket.h>
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#include <net/if.h>
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#ifdef __FreeBSD__
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#else
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#include <netisdn/i4b_debug.h>
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#include <netisdn/i4b_ioctl.h>
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#endif
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#include <netisdn/i4b_global.h>
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#include <netisdn/i4b_l2.h>
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#include <netisdn/i4b_l1l2.h>
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#include <dev/ic/isic_l1.h>
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#include <dev/ic/isac.h>
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#include <dev/ic/hscx.h>
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/*---------------------------------------------------------------------------*
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* Niccy GO@ definitions
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*
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* the card uses 2 i/o addressranges each using 2 bytes
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*
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* addressrange 0:
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* offset 0 - ISAC dataregister
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* offset 1 - HSCX dataregister
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* addressrange 1:
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* offset 0 - ISAC addressregister
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* offset 1 - HSCX addressregister
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*
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* to access an ISAC/HSCX register, you have to write the register
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* number into the ISAC or HSCX addressregister and then read/write
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* data for the ISAC/HSCX register into/from the corresponding
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* dataregister.
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*
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* Thanks to Klaus Muehle of Dr. Neuhaus Telekommunikation for giving
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* out this information!
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*
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*---------------------------------------------------------------------------*/
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#define NICCY_PORT_MIN 0x200
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#define NICCY_PORT_MAX 0x3e0
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#define HSCX_ABIT 0x1000 /* flag, HSCX A is meant */
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#define HSCX_BBIT 0x2000 /* flag, HSCX B is meant */
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#define HSCX_BOFF 0x40
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#define ADDR_OFF 2 /* address register range offset XXX */
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#define ISAC_DATA 0
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#define HSCX_DATA 1
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#define ISAC_ADDR 0
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#define HSCX_ADDR 1
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#ifdef __FreeBSD__
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#if 0
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#define HSCXADEBUG
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#define HSCXBDEBUG
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#define ISACDEBUG
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#else
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#undef HSCXADEBUG
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#undef HSCXBDEBUG
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#undef ISACDEBUG
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#endif
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ read fifo routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_read_fifo(void *buf, const void *base, size_t len)
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{
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register int offset;
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register u_int data;
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int x = SPLI4B();
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if((u_int)base & HSCX_ABIT)
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{
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(u_int)base &= ~HSCX_ABIT;
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(u_int)data = ((u_int)base + HSCX_DATA);
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(u_int)base += (ADDR_OFF + HSCX_ADDR);
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offset = 0;
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#ifdef HSCXADEBUG
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printf("GO/A/frd: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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else if((u_int)base & HSCX_BBIT)
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{
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(u_int)base &= ~HSCX_BBIT;
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(u_int)data = ((u_int)base + HSCX_DATA);
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(u_int)base += (ADDR_OFF + HSCX_ADDR);
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offset = HSCX_BOFF;
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#ifdef HSCXBDEBUG
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printf("GO/B/frd: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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else
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{
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(u_int)data = ((u_int)base + ISAC_DATA);
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(u_int)base += (ADDR_OFF + ISAC_ADDR);
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offset = 0;
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#ifdef ISACDEBUG
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printf("GO/I/frd: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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for(;len > 0; len--, offset++)
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{
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outb((int)base, (u_char)offset);
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*((u_char *)buf + offset) = inb((int)data);
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}
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splx(x);
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ write fifo routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_write_fifo(void *base, const void *buf, size_t len)
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{
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register int offset;
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register u_int data;
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int x = SPLI4B();
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if((u_int)base & HSCX_ABIT)
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{
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(u_int)base &= ~HSCX_ABIT;
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(u_int)data = ((u_int)base + HSCX_DATA);
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(u_int)base += (ADDR_OFF + HSCX_ADDR);
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offset = 0;
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#ifdef HSCXADEBUG
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printf("GO/A/fwr: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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else if((u_int)base & HSCX_BBIT)
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{
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(u_int)base &= ~HSCX_BBIT;
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(u_int)data = ((u_int)base + HSCX_DATA);
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(u_int)base += (ADDR_OFF + HSCX_ADDR);
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offset = HSCX_BOFF;
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#ifdef HSCXBDEBUG
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printf("GO/B/fwr: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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else
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{
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(u_int)data = ((u_int)base + ISAC_DATA);
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(u_int)base += (ADDR_OFF + ISAC_ADDR);
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offset = 0;
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#ifdef ISACDEBUG
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printf("GO/I/fwr: base=0x%x, data=0x%x, len=%d\n", base, data, len);
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#endif
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}
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for(;len > 0; len--, offset++)
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{
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outb((int)base, (u_char)offset);
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outb((int)data, *((u_char *)buf + offset));
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}
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splx(x);
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ write register routine
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*---------------------------------------------------------------------------*/
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static void
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drnngo_write_reg(u_char *base, u_int offset, u_int v)
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{
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int x = SPLI4B();
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if((u_int)base & HSCX_ABIT)
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{
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(u_int)base &= ~HSCX_ABIT;
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outb((int)base + ADDR_OFF + HSCX_ADDR, (u_char)offset);
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outb((int)base + HSCX_DATA, (u_char)v);
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#ifdef HSCXADEBUG
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printf("GO/A/rwr: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + HSCX_ADDR, (int)base + HSCX_DATA,
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(u_char)offset, (u_char)v);
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#endif
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}
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else if((u_int)base & HSCX_BBIT)
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{
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(u_int)base &= ~HSCX_BBIT;
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outb((int)base + ADDR_OFF + HSCX_ADDR, (u_char)(offset + HSCX_BOFF));
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outb((int)base + HSCX_DATA, (u_char)v);
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#ifdef HSCXBDEBUG
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printf("GO/B/rwr: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + HSCX_ADDR, (int)base + HSCX_DATA,
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(u_char)(offset + HSCX_BOFF), (u_char)v);
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#endif
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}
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else
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{
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outb((int)base + ADDR_OFF + ISAC_ADDR, (u_char)offset);
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outb((int)base + ISAC_DATA, (u_char)v);
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#ifdef ISACDEBUG
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printf("GO/I/rwr: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + ISAC_ADDR, (int)base + ISAC_DATA,
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(u_char)offset, (u_char)v);
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#endif
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}
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splx(x);
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}
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/*---------------------------------------------------------------------------*
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* Dr. Neuhaus Niccy GO@ read register routine
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*---------------------------------------------------------------------------*/
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static u_char
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drnngo_read_reg(u_char *base, u_int offset)
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{
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u_char val;
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int x = SPLI4B();
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if((u_int)base & HSCX_ABIT)
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{
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(u_int)base &= ~HSCX_ABIT;
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outb((int)base + ADDR_OFF + HSCX_ADDR, (u_char)offset);
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val = inb((int)base + HSCX_DATA);
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#ifdef HSCXADEBUG
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printf("GO/A/rrd: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + HSCX_ADDR, (int)base + HSCX_DATA,
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(u_char)offset, (u_char)val);
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#endif
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}
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else if((u_int)base & HSCX_BBIT)
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{
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(u_int)base &= ~HSCX_BBIT;
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outb((int)base + ADDR_OFF + HSCX_ADDR, (u_char)(offset + HSCX_BOFF));
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val = inb((int)base + HSCX_DATA);
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#ifdef HSCXBDEBUG
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printf("GO/B/rrd: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + HSCX_ADDR, (int)base + HSCX_DATA,
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(u_char)(offset + HSCX_BOFF), (u_char)val);
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#endif
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}
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else
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{
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outb((int)base + ADDR_OFF + ISAC_ADDR, (u_char)offset);
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val = inb((int)base + ISAC_DATA);
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#ifdef ISACDEBUG
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printf("GO/I/rrd: base=0x%x, addr=0x%x, offset=0x%x, val=0x%x\n",
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(int)base + ADDR_OFF + ISAC_ADDR, (int)base + ISAC_DATA,
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(u_char)offset, (u_char)val);
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#endif
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}
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splx(x);
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return(val);
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}
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/*---------------------------------------------------------------------------*
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* isic_probe_drnngo - probe for Dr. Neuhaus Niccy GO@
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*---------------------------------------------------------------------------*/
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int
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isic_probe_drnngo(struct isa_device *dev, unsigned int iobase2)
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{
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struct isic_softc *sc = &l1_sc[dev->id_unit];
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/* check max unit range */
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if(dev->id_unit >= ISIC_MAXUNIT)
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{
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printf("isic%d: Error, unit %d >= ISIC_MAXUNIT for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit, dev->id_unit);
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return(0);
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}
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sc->sc_unit = dev->id_unit;
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/* check IRQ validity */
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switch(ffs(dev->id_irq)-1)
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{
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case 3:
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case 4:
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case 5:
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case 9:
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case 10:
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case 11:
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case 12:
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case 15:
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break;
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default:
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printf("isic%d: Error, invalid IRQ [%d] specified for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit, ffs(dev->id_irq)-1);
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return(0);
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break;
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}
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sc->sc_irq = dev->id_irq;
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/* check if memory addr specified */
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if(dev->id_maddr)
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{
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printf("isic%d: Error, mem addr 0x%lx specified for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit, (u_long)dev->id_maddr);
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return(0);
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}
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dev->id_msize = 0;
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/* check if we got an iobase */
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if(dev->id_iobase < NICCY_PORT_MIN || dev->id_iobase > NICCY_PORT_MAX)
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{
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printf("isic%d: Error, invalid iobase 0x%x specified for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit, dev->id_iobase);
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return(0);
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}
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sc->sc_port = dev->id_iobase;
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if(iobase2 == 0)
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{
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printf("isic%d: Error, iobase2 is 0 for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit);
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return(0);
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}
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if(iobase2 < NICCY_PORT_MIN || iobase2 > NICCY_PORT_MAX)
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{
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printf("isic%d: Error, invalid port1 0x%x specified for Dr. Neuhaus Niccy GO@!\n",
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dev->id_unit, iobase2);
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return(0);
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}
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/*XXX*/ if((dev->id_iobase + 2) != iobase2)
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{
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printf("isic%d: Error, port1 must be (port0+2) for Dr.Neuhaus Niccy GO@!\n",
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dev->id_unit);
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return(0);
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}
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/* setup ISAC access routines */
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sc->clearirq = NULL;
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sc->readreg = drnngo_read_reg;
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sc->writereg = drnngo_write_reg;
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sc->readfifo = drnngo_read_fifo;
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sc->writefifo = drnngo_write_fifo;
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/* setup card type */
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sc->sc_cardtyp = CARD_TYPEP_DRNNGO;
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/* setup IOM bus type */
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sc->sc_bustyp = BUS_TYPE_IOM2;
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sc->sc_ipac = 0;
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sc->sc_bfifolen = HSCX_FIFO_LEN;
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/* setup ISAC and HSCX base addr */
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ISAC_BASE = (caddr_t)dev->id_iobase;
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HSCX_A_BASE = (caddr_t)(((u_int)dev->id_iobase) | HSCX_ABIT);
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HSCX_B_BASE = (caddr_t)(((u_int)dev->id_iobase) | HSCX_BBIT);
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/*
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* Read HSCX A/B VSTR. Expected value for Dr. Neuhaus Niccy GO@ based
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* boards is 0x05 in the least significant bits.
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*/
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if( ((HSCX_READ(0, H_VSTR) & 0xf) != 0x5) ||
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((HSCX_READ(1, H_VSTR) & 0xf) != 0x5) )
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{
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printf("isic%d: HSCX VSTR test failed for Dr. Neuhaus Niccy GO@\n",
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dev->id_unit);
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printf("isic%d: HSC0: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(0, H_VSTR));
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printf("isic%d: HSC1: VSTR: %#x\n",
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dev->id_unit, HSCX_READ(1, H_VSTR));
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return (0);
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}
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return (1);
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}
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/*---------------------------------------------------------------------------*
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* isic_attach_drnngo - attach Dr. Neuhaus Niccy GO@
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*---------------------------------------------------------------------------*/
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int
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isic_attach_drnngo(struct isa_device *dev, unsigned int iobase2)
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{
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return (1);
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}
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#else
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static u_int8_t drnngo_read_reg __P((struct isic_softc *sc, int what, bus_size_t offs));
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static void drnngo_write_reg __P((struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data));
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static void drnngo_read_fifo __P((struct isic_softc *sc, int what, void *buf, size_t size));
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static void drnngo_write_fifo __P((struct isic_softc *sc, int what, const void *data, size_t size));
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void isic_attach_drnngo __P((struct isic_softc *sc));
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/*
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* Mapping from "what" parameter to offsets into the io map
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*/
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static struct {
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bus_size_t oa, /* address register offset */
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od, /* data register offset */
|
|
or; /* additional chip register offset */
|
|
} offset[] =
|
|
{
|
|
{ ISAC_ADDR, ISAC_DATA, 0 }, /* ISAC access */
|
|
{ HSCX_ADDR, HSCX_DATA, 0 }, /* HSCX A access */
|
|
{ HSCX_ADDR, HSCX_DATA, HSCX_BOFF } /* HSCX B access */
|
|
};
|
|
|
|
static void
|
|
drnngo_read_fifo(struct isic_softc *sc, int what, void *buf, size_t size)
|
|
{
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
bus_space_handle_t hd = sc->sc_maps[0].h, ha = sc->sc_maps[1].h;
|
|
bus_space_write_1(t, ha, offset[what].oa, offset[what].or);
|
|
bus_space_read_multi_1(t, hd, offset[what].od, buf, size);
|
|
}
|
|
|
|
static void
|
|
drnngo_write_fifo(struct isic_softc *sc, int what, const void *buf, size_t size)
|
|
{
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
bus_space_handle_t hd = sc->sc_maps[0].h, ha = sc->sc_maps[1].h;
|
|
bus_space_write_1(t, ha, offset[what].oa, offset[what].or);
|
|
bus_space_write_multi_1(t, hd, offset[what].od, (u_int8_t*)buf, size);
|
|
}
|
|
|
|
static void
|
|
drnngo_write_reg(struct isic_softc *sc, int what, bus_size_t offs, u_int8_t data)
|
|
{
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
bus_space_handle_t hd = sc->sc_maps[0].h, ha = sc->sc_maps[1].h;
|
|
bus_space_write_1(t, ha, offset[what].oa, offs+offset[what].or);
|
|
bus_space_write_1(t, hd, offset[what].od, data);
|
|
}
|
|
|
|
static u_int8_t
|
|
drnngo_read_reg(struct isic_softc *sc, int what, bus_size_t offs)
|
|
{
|
|
bus_space_tag_t t = sc->sc_maps[0].t;
|
|
bus_space_handle_t hd = sc->sc_maps[0].h, ha = sc->sc_maps[1].h;
|
|
bus_space_write_1(t, ha, offset[what].oa, offs+offset[what].or);
|
|
return bus_space_read_1(t, hd, offset[what].od);
|
|
}
|
|
|
|
void
|
|
isic_attach_drnngo(struct isic_softc *sc)
|
|
{
|
|
/* setup access routines */
|
|
|
|
sc->clearirq = NULL;
|
|
sc->readreg = drnngo_read_reg;
|
|
sc->writereg = drnngo_write_reg;
|
|
|
|
sc->readfifo = drnngo_read_fifo;
|
|
sc->writefifo = drnngo_write_fifo;
|
|
|
|
/* setup card type */
|
|
|
|
sc->sc_cardtyp = CARD_TYPEP_DRNNGO;
|
|
|
|
/* setup IOM bus type */
|
|
|
|
sc->sc_bustyp = BUS_TYPE_IOM2;
|
|
|
|
sc->sc_ipac = 0;
|
|
sc->sc_bfifolen = HSCX_FIFO_LEN;
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif /* ISICPNP_DRN_NGO */
|