163 lines
3.3 KiB
C
163 lines
3.3 KiB
C
typedef u_char physaddr[3];
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typedef u_char physlen[3];
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#define ltophys _lto3b
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#define phystol _3btol
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/* WD7000 registers */
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#define WDS_STAT 0 /* read */
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#define WDS_IRQSTAT 1 /* read */
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#define WDS_CMD 0 /* write */
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#define WDS_IRQACK 1 /* write */
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#define WDS_HCR 2 /* write */
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/* WDS_STAT (read) defs */
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#define WDSS_IRQ 0x80
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#define WDSS_RDY 0x40
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#define WDSS_REJ 0x20
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#define WDSS_INIT 0x10
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/* WDS_IRQSTAT (read) defs */
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#define WDSI_MASK 0xc0
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#define WDSI_ERR 0x00
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#define WDSI_MFREE 0x80
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#define WDSI_MSVC 0xc0
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/* WDS_CMD (write) defs */
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#define WDSC_NOOP 0x00
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#define WDSC_INIT 0x01
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#define WDSC_DISUNSOL 0x02
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#define WDSC_ENAUNSOL 0x03
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#define WDSC_IRQMFREE 0x04
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#define WDSC_SCSIRESETSOFT 0x05
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#define WDSC_SCSIRESETHARD 0x06
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#define WDSC_MSTART(m) (0x80 + (m))
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#define WDSC_MMSTART(m) (0xc0 + (m))
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/* WDS_HCR (write) defs */
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#define WDSH_IRQEN 0x08
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#define WDSH_DRQEN 0x04
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#define WDSH_SCSIRESET 0x02
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#define WDSH_ASCRESET 0x01
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#define WDS_NSEG 17
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struct wds_scat_gath {
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physlen seg_len;
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physaddr seg_addr;
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};
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struct wds_cmd {
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u_char opcode;
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u_char targ;
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struct scsi_generic scb;
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u_char stat;
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u_char venderr;
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physlen len;
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physaddr data;
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physaddr link;
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u_char write;
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u_char xx[6];
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};
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struct wds_scb {
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struct wds_cmd cmd;
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struct wds_cmd sense;
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struct wds_scat_gath scat_gath[WDS_NSEG];
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struct scsipi_sense_data sense_data;
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TAILQ_ENTRY(wds_scb) chain;
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struct wds_scb *nexthash;
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u_long hashkey;
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struct scsipi_xfer *xs;
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int flags;
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#define SCB_ALLOC 0x01
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#define SCB_ABORT 0x02
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#ifdef WDSDIAG
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#define SCB_SENDING 0x04
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#endif
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#define SCB_POLLED 0x08
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#define SCB_SENSE 0x10
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#define SCB_DONE 0x20 /* for internal commands only */
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#define SCB_BUFFER 0x40
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int timeout;
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/*
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* DMA maps used by the SCB. These maps are created in
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* wds_init_scb().
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*/
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/*
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* The DMA map maps an individual SCB. This map is permanently
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* loaded in wds_init_scb().
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*/
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bus_dmamap_t dmamap_self;
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/*
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* This map maps the buffer involved in the transfer.
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* Its contents are loaded into "scat_gath" above.
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*/
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bus_dmamap_t dmamap_xfer;
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};
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#define WDSX_SCSICMD 0x00
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#define WDSX_SCSISG 0x01
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#define WDSX_OPEN_RCVBUF 0x80
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#define WDSX_RCV_CMD 0x81
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#define WDSX_RCV_DATA 0x82
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#define WDSX_RCV_DATASTAT 0x83
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#define WDSX_SND_DATA 0x84
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#define WDSX_SND_DATASTAT 0x85
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#define WDSX_SND_CMDSTAT 0x86
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#define WDSX_READINIT 0x88
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#define WDSX_READSCSIID 0x89
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#define WDSX_SETUNSOLIRQMASK 0x8a
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#define WDSX_GETUNSOLIRQMASK 0x8b
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#define WDSX_GETFIRMREV 0x8c
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#define WDSX_EXECDIAG 0x8d
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#define WDSX_SETEXECPARM 0x8e
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#define WDSX_GETEXECPARM 0x8f
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struct wds_mbx_out {
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u_char cmd;
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physaddr scb_addr;
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};
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struct wds_mbx_in {
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u_char stat;
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physaddr scb_addr;
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};
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/*
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* mbo.cmd values
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*/
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#define WDS_MBO_FREE 0x0 /* MBO entry is free */
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#define WDS_MBO_START 0x1 /* MBO activate entry */
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/*
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* mbi.stat values
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*/
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#define WDS_MBI_FREE 0x00 /* MBI entry is free */
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#define WDS_MBI_OK 0x01 /* completed without error */
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#define WDS_MBI_OKERR 0x02 /* completed with error */
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#define WDS_MBI_ETIME 0x04
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#define WDS_MBI_ERESET 0x05
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#define WDS_MBI_ETARCMD 0x06
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#define WDS_MBI_ERESEL 0x80
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#define WDS_MBI_ESEL 0x81
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#define WDS_MBI_EABORT 0x82
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#define WDS_MBI_ESRESET 0x83
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#define WDS_MBI_EHRESET 0x84
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struct wds_setup {
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u_char opcode;
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u_char scsi_id;
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u_char buson_t;
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u_char busoff_t;
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u_char xx;
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physaddr mbaddr;
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u_char nomb;
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u_char nimb;
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};
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