scw 5643984efd In iopiic_wait(), latched status bits in the ISR is cleared by writing ... ones to the appropriate bits, not zeroes. In this case, just write the value from a previous read of the register.		2005-01-06 09:34:02 +00:00
..
becc_button.c
becc_csrvar.h
becc_icu.c
becc_intr.h
becc_pci_space_asm.S
becc_pci.c
becc_space.c
becc_timer.c
becc.c	Phase out the use of a string as first "attach args" member to control	2004-08-30 15:05:15 +00:00
beccreg.h
beccvar.h
files.becc
files.i80200
files.i80312
files.i80321
files.ixp425
files.pxa2x0
i80200_icu.c
i80200_irq.S
i80200reg.h
i80200var.h
i80312_gpio.c
i80312_i2c.c
i80312_mem.c
i80312_pci.c
i80312_space.c
i80312.c	Phase out the use of a string as first "attach args" member to control	2004-08-30 15:05:15 +00:00
i80312reg.h
i80312var.h
i80321_aau.c
i80321_gpio.c
i80321_i2c.c
i80321_icu.c
i80321_intr.h
i80321_mcu.c
i80321_pci.c	Start I/O range at base+0x1000 to avoid 0.	2004-12-09 04:40:20 +00:00
i80321_space.c
i80321_timer.c
i80321_wdog.c
i80321.c	Phase out the use of a string as first "attach args" member to control	2004-08-30 15:05:15 +00:00
i80321reg.h
i80321var.h
iopaau.c
iopaaureg.h
iopaauvar.h
iopi2c.c	In iopiic_wait(), latched status bits in the ISR is cleared by writing	2005-01-06 09:34:02 +00:00
iopi2creg.h
iopi2cvar.h
ixp425_a4x_io.S
ixp425_a4x_space.c
ixp425_com.c
ixp425_intr.c
ixp425_intr.h
ixp425_mem.c
ixp425_pci_asm.S
ixp425_pci_dma.c
ixp425_pci_space.c
ixp425_pci.c
ixp425_sip.c
ixp425_sipvar.h
ixp425_space.c
ixp425_timer.c
ixp425.c	Phase out the use of a string as first "attach args" member to control	2004-08-30 15:05:15 +00:00
ixp425reg.h
ixp425var.h
pxa2x0_a4x_io.S
pxa2x0_a4x_space.c
pxa2x0_com.c
pxa2x0_dma.c
pxa2x0_gpio.c
pxa2x0_gpio.h
pxa2x0_intr.c
pxa2x0_intr.h
pxa2x0_lcd.c
pxa2x0_lcd.h
pxa2x0_space.c	pxa2x0_bs_unmap(): KVA allocated in pxa2x0_bs_map() needs to be freed.	2004-06-07 19:45:22 +00:00
pxa2x0.c
pxa2x0reg.h	PXA255 has 85 GPIO pins, not 81.	2004-09-24 17:30:22 +00:00
pxa2x0var.h
xscale_pmc.c
xscalereg.h
xscalevar.h