5bfa580df1
"The Certance CP3100 product family provides high-end disk-to-disk-to-tape (D2D2T) functionality for small-to-medium businesses." To software, the unit is very similar to the IQ80321 and IQ31244 eval boards from Intel. As such, we share almost all of their code. Onboard hardware: - IOP321 XScale CPU. Core clock is 600MHz. - 256MB SDRAM (not sure if that's true for all) - Four-port Intel i31244 SATA controller. One port is connected to the internal disk. The remaining three are available on the back-panel. - Dual GigE ports on the back panel, using an Intel i82546EB controller. - Two Symbios Logic 53c1010 SCSI controllers, one in host mode the other in target mode. Both SCSI busses are available on the back panel. Note that NetBSD does not support SCSI target mode. - 8MB of NOR Flash, containing a fairly vanilla Redboot together with a minimal compressed Linux image. - Some front-panel LEDS (not supported). - Serial console. Contributed by Wasabi Systems, Inc.
161 lines
4.6 KiB
C
161 lines
4.6 KiB
C
/* $NetBSD: cp3100_pci.c,v 1.1 2006/11/08 23:49:02 scw Exp $ */
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/*
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* Copyright 2006 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* CP3100 PCI interrupt support.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cp3100_pci.c,v 1.1 2006/11/08 23:49:02 scw Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <evbarm/iq80321/iq80321reg.h>
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#include <evbarm/iq80321/iq80321var.h>
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#include <arm/xscale/i80321reg.h>
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#include <arm/xscale/i80321var.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/ppbreg.h>
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int iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
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const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
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const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
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void *iq80321_pci_intr_establish(void *, pci_intr_handle_t,
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int, int (*func)(void *), void *);
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void iq80321_pci_intr_disestablish(void *, void *);
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void
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iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
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{
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pc->pc_intr_v = cookie; /* the i80321 softc */
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pc->pc_intr_map = iq80321_pci_intr_map;
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pc->pc_intr_string = iq80321_pci_intr_string;
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pc->pc_intr_evcnt = iq80321_pci_intr_evcnt;
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pc->pc_intr_establish = iq80321_pci_intr_establish;
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pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
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}
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int
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iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
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int b, d, f;
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uint32_t busno;
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busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
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busno = PCIXSR_BUSNO(busno);
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if (busno == 0xff)
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busno = 0;
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pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
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/* No mappings for devices not on our bus. */
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if (b != busno)
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goto no_mapping;
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switch (d) {
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case 0: /* i82546EB Dual GigE */
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/*
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* This is a dual-function chip which uses INTA and INTB,
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* connected to XINT0 and XINT1 respectively.
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*/
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if (f != 0 && f != 1)
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goto no_mapping;
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*ihp = ICU_INT_XINT(f);
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return (0);
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case 1: /* i31244 S-ATA Interface */
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*ihp = ICU_INT_XINT(2);
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return (0);
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case 2: /* Symbios Logic 53c1010 SCSI Controllers */
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case 3:
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/*
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* Both controllers share a single pin
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*/
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*ihp = ICU_INT_XINT(3);
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return (0);
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default:
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no_mapping:
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printf("iq80321_pci_intr_map: no mapping for %d/%d/%d/%c\n",
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pa->pa_bus, pa->pa_device, pa->pa_function,
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'@' + pa->pa_intrpin);
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return (1);
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}
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return (0);
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}
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const char *
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iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
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{
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return (i80321_irqnames[ih]);
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}
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const struct evcnt *
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iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
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{
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/* XXX For now. */
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return (NULL);
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}
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void *
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iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
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int (*func)(void *), void *arg)
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{
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return (i80321_intr_establish(ih, ipl, func, arg));
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}
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void
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iq80321_pci_intr_disestablish(void *v, void *cookie)
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{
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i80321_intr_disestablish(cookie);
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}
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