500 lines
11 KiB
C
500 lines
11 KiB
C
/* $NetBSD: vr.c,v 1.26 2001/06/11 06:11:01 enami Exp $ */
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/*-
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* Copyright (c) 1999
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* Shin Takemura and PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the PocketBSD project
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* and its contributors.
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* 4. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include "opt_kgdb.h"
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#include <sys/param.h>
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/reboot.h>
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#include <sys/kcore.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <machine/reg.h>
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#include <machine/psl.h>
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#include <machine/locore.h>
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#include <machine/sysconf.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <mips/mips_param.h> /* hokey spl()s */
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#include <mips/mips/mips_mcclock.h> /* mcclock CPUspeed estimation */
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#include <dev/hpc/hpckbdvar.h>
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#include "opt_vr41xx.h"
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#include <hpcmips/vr/vr.h>
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#include <hpcmips/vr/vr_asm.h>
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#include <hpcmips/vr/vrcpudef.h>
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#include <hpcmips/vr/vripreg.h>
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#include <hpcmips/vr/rtcreg.h>
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#include <hpcmips/hpcmips/machdep.h> /* cpu_name */
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#include <machine/bootinfo.h>
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#include "vrip.h"
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#if NVRIP > 0
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#include <hpcmips/vr/vripvar.h>
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#endif
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#include "vrbcu.h"
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#if NVRBCU > 0
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#include <hpcmips/vr/bcuvar.h>
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#endif
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#include "vrdsu.h"
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#if NVRDSU > 0
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#include <hpcmips/vr/vrdsuvar.h>
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#endif
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#include "com.h"
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#if NCOM > 0
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#include <sys/termios.h>
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#include <sys/ttydefaults.h>
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#include <hpcmips/vr/siureg.h>
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#include <hpcmips/vr/com_vripvar.h>
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#ifndef CONSPEED
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#define CONSPEED TTYDEF_SPEED
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#endif
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#endif
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#include "hpcfb.h"
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#include "vrkiu.h"
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#if (NVRKIU > 0) || (NHPCFB > 0)
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/rasops/rasops.h>
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#endif
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#if NHPCFB > 0
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#include <dev/hpc/hpcfbvar.h>
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#endif
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#if NVRKIU > 0
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#include <arch/hpcmips/vr/vrkiureg.h>
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#include <arch/hpcmips/vr/vrkiuvar.h>
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#endif
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void vr_init __P((void));
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void vr_os_init __P((void));
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void vr_bus_reset __P((void));
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int vr_intr __P((u_int32_t, u_int32_t, u_int32_t, u_int32_t));
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void vr_cons_init __P((void));
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void vr_device_register __P((struct device *, void *));
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void vr_fb_init __P((caddr_t*));
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void vr_mem_init __P((paddr_t));
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void vr_find_dram __P((paddr_t, paddr_t));
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void vr_reboot __P((int howto, char *bootstr));
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extern unsigned nullclkread __P((void));
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extern unsigned (*clkread) __P((void));
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/*
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* CPU interrupt dispatch table (HwInt[0:3])
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*/
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int null_handler __P((void*, u_int32_t, u_int32_t));
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static int (*intr_handler[4]) __P((void*, u_int32_t, u_int32_t)) =
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{
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null_handler,
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null_handler,
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null_handler,
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null_handler
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};
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static void *intr_arg[4];
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extern phys_ram_seg_t mem_clusters[];
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extern int mem_cluster_cnt;
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void
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vr_init()
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{
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/*
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* Platform Information.
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*/
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/*
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* Platform Specific Function Hooks
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*/
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platform.os_init = vr_os_init;
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platform.iointr = vr_intr;
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platform.bus_reset = vr_bus_reset;
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platform.cons_init = vr_cons_init;
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platform.device_register = vr_device_register;
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platform.fb_init = vr_fb_init;
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platform.mem_init = vr_mem_init;
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platform.reboot = vr_reboot;
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#if NVRBCU > 0
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sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
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vrbcu_vrip_getcpuname(),
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vrbcu_vrip_getcpumajor(),
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vrbcu_vrip_getcpuminor(),
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vrbcu_vrip_getcpuclock() / 1000000,
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(vrbcu_vrip_getcpuclock() % 1000000) / 1000);
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#else
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sprintf(cpu_name, "NEC VR41xx");
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#endif
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}
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void
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vr_mem_init(kernend)
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paddr_t kernend;
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{
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mem_clusters[0].start = 0;
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mem_clusters[0].size = kernend;
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mem_cluster_cnt = 1;
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vr_find_dram(kernend, 0x02000000);
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vr_find_dram(0x02000000, 0x04000000);
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vr_find_dram(0x04000000, 0x06000000);
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vr_find_dram(0x06000000, 0x08000000);
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/* Clear currently unused D-RAM area (For reboot Windows CE clearly)*/
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memset((void *)(KERNBASE + 0x400), 0, KERNTEXTOFF - (KERNBASE + 0x800));
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}
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void
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vr_find_dram(addr, end)
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paddr_t addr, end;
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{
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int n;
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caddr_t page;
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#ifdef NARLY_MEMORY_PROBE
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int x, i;
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#endif
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#ifdef VR_FIND_DRAMLIM
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if (VR_FIND_DRAMLIM < end)
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end = VR_FIND_DRAMLIM;
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#endif
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n = mem_cluster_cnt;
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for (; addr < end; addr += NBPG) {
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page = (void *)MIPS_PHYS_TO_KSEG1(addr);
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if (badaddr(page, 4))
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goto bad;
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/* stop memory probing at first memory image */
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if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
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return;
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*(volatile int *)(page+0) = 0xa5a5a5a5;
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*(volatile int *)(page+4) = 0x5a5a5a5a;
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wbflush();
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if (*(volatile int *)(page+0) != 0xa5a5a5a5)
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goto bad;
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*(volatile int *)(page+0) = 0x5a5a5a5a;
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*(volatile int *)(page+4) = 0xa5a5a5a5;
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wbflush();
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if (*(volatile int *)(page+0) != 0x5a5a5a5a)
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goto bad;
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#ifdef NARLY_MEMORY_PROBE
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x = random();
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for (i = 0; i < NBPG; i += 4)
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*(volatile int *)(page+i) = (x ^ i);
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wbflush();
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for (i = 0; i < NBPG; i += 4)
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if (*(volatile int *)(page+i) != (x ^ i))
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goto bad;
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x = random();
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for (i = 0; i < NBPG; i += 4)
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*(volatile int *)(page+i) = (x ^ i);
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wbflush();
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for (i = 0; i < NBPG; i += 4)
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if (*(volatile int *)(page+i) != (x ^ i))
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goto bad;
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#endif
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if (!mem_clusters[n].size)
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mem_clusters[n].start = addr;
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mem_clusters[n].size += NBPG;
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continue;
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bad:
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if (mem_clusters[n].size)
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++n;
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continue;
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}
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if (mem_clusters[n].size)
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++n;
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mem_cluster_cnt = n;
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}
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void
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vr_fb_init(kernend)
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caddr_t *kernend;
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{
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/* Nothing to do */
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}
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void
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vr_os_init()
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{
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/*
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* Set up interrupt handling and I/O addresses.
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*/
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splvec.splbio = MIPS_SPL0;
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splvec.splnet = MIPS_SPL0;
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splvec.spltty = MIPS_SPL0;
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splvec.splvm = MIPS_SPL0;
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splvec.splclock = MIPS_SPL_0_1;
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splvec.splstatclock = MIPS_SPL_0_1;
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/* no high resolution timer circuit; possibly never called */
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clkread = nullclkread;
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#ifdef NOT_YET
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mcclock_addr = (volatile struct chiptime *)
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MIPS_PHYS_TO_KSEG1(Vr_SYS_CLOCK);
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mc_cpuspeed(mcclock_addr, MIPS_INT_MASK_1);
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#else
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printf("%s(%d): cpuspeed estimation is notimplemented\n",
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__FILE__, __LINE__);
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#endif
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#ifdef HPCMIPS_L1CACHE_DISABLE
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cpuspeed = 1; /* XXX, CPU is very very slow because L1 cache is */
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/* disabled. */
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#endif /* HPCMIPS_L1CAHCE_DISABLE */
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}
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/*
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* Initalize the memory system and I/O buses.
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*/
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void
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vr_bus_reset()
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{
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printf("%s(%d): vr_bus_reset() not implemented.\n",
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__FILE__, __LINE__);
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}
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void
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vr_cons_init()
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{
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#if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
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extern bus_space_tag_t system_bus_iot;
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extern bus_space_tag_t mb_bus_space_init __P((void));
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/*
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* At this time, system_bus_iot is not initialized yet.
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* Just initialize it here.
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*/
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mb_bus_space_init();
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#endif
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#if NCOM > 0
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#ifdef KGDB
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/* if KGDB is defined, always use the serial port for KGDB */
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if (com_vrip_cndb_attach(system_bus_iot, VRIP_SIU_ADDR, 9600,
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VRCOM_FREQ, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
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printf("%s(%d): can't init kgdb's serial port",
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__FILE__, __LINE__);
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}
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#else
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if (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) {
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/* Serial console */
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if (com_vrip_cndb_attach(system_bus_iot,
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VRIP_SIU_ADDR, CONSPEED, VRCOM_FREQ,
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(TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
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printf("%s(%d): can't init serial console",
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__FILE__, __LINE__);
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} else {
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return;
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}
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}
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#endif
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#endif
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#if NHPCFB > 0
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if (hpcfb_cnattach(NULL)) {
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printf("%s(%d): can't init fb console", __FILE__, __LINE__);
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} else {
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goto find_keyboard;
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}
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find_keyboard:
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#endif
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#if NVRKIU > 0 && VRIP_KIU_ADDR != VRIP_NO_ADDR
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if (vrkiu_cnattach(system_bus_iot, VRIP_KIU_ADDR)) {
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printf("%s(%d): can't init vrkiu as console",
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__FILE__, __LINE__);
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} else {
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return;
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}
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#endif
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}
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void
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vr_device_register(dev, aux)
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struct device *dev;
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void *aux;
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{
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printf("%s(%d): vr_device_register() not implemented.\n",
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__FILE__, __LINE__);
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panic("abort");
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}
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void
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vr_reboot(howto, bootstr)
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int howto;
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char *bootstr;
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{
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/*
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* power down
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*/
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if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
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printf("fake powerdown\n");
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__asm(__CONCAT(".word ",___STRING(VR_OPCODE_HIBERNATE)));
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm(".set reorder");
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/* not reach */
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vr_reboot(howto&~RB_HALT, bootstr);
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}
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/*
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* halt
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*/
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if (howto & RB_HALT) {
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#if NVRIP > 0
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_spllower(~MIPS_INT_MASK_0);
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vrip_intr_suspend();
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#else
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splhigh();
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#endif
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__asm(".set noreorder");
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__asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm(".set reorder");
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#if NVRIP > 0
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vrip_intr_resume();
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#endif
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}
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/*
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* reset
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*/
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#if NVRDSU
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vrdsu_reset();
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#else
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printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
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#endif
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}
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void *
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vr_intr_establish(line, ih_fun, ih_arg)
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int line;
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int (*ih_fun) __P((void*, u_int32_t, u_int32_t));
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void *ih_arg;
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{
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if (intr_handler[line] != null_handler) {
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panic("vr_intr_establish: can't establish duplicated intr handler.");
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}
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intr_handler[line] = ih_fun;
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intr_arg[line] = ih_arg;
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return (void*)line;
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}
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void
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vr_intr_disestablish(ih)
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void *ih;
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{
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int line = (int)ih;
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intr_handler[line] = null_handler;
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intr_arg[line] = NULL;
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}
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int
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null_handler(arg, pc, statusReg)
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void *arg;
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u_int32_t pc;
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u_int32_t statusReg;
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{
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printf("null_handler\n");
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return 0;
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}
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/*
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* Handle interrupts.
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*/
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int
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vr_intr(status, cause, pc, ipending)
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u_int32_t status, cause, pc, ipending;
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{
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int hwintr;
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hwintr = (ffs(ipending >> 10) -1) & 0x3;
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(*intr_handler[hwintr])(intr_arg[hwintr], pc, status);
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return (MIPS_SR_INT_IE | (status & ~cause & MIPS_HARD_INT_MASK));
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}
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/*
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int x4181 = VR4181;
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int x4101 = VR4101;
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int x4102 = VR4102;
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int x4111 = VR4111;
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int x4121 = VR4121;
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int x4122 = VR4122;
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int xo4181 = ONLY_VR4181;
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int xo4101 = ONLY_VR4101;
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int xo4102 = ONLY_VR4102;
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int xo4111_4121 = ONLY_VR4111_4121;
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int g4101=VRGROUP_4101;
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int g4102=VRGROUP_4102;
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int g4181=VRGROUP_4181;
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int g4102_4121=VRGROUP_4102_4121;
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int g4111_4121=VRGROUP_4111_4121;
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int g4102_4122=VRGROUP_4102_4122;
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int g4111_4122=VRGROUP_4111_4122;
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int single_vrip_base=SINGLE_VRIP_BASE;
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int vrip_base_addr=VRIP_BASE_ADDR;
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*/
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