178 lines
7.4 KiB
C
178 lines
7.4 KiB
C
/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/11/93
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*
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* from: Header: pmap.h,v 1.11 93/05/25 10:36:09 torek Exp
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* $Id: pmap.h,v 1.6 1994/08/06 22:08:32 deraadt Exp $
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*/
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#ifndef _SPARC_PMAP_H_
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#define _SPARC_PMAP_H_
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#include <machine/pte.h>
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/*
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* Pmap structure.
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*
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* The pmap structure really comes in two variants, one---a single
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* instance---for kernel virtual memory and the other---up to nproc
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* instances---for user virtual memory. Unfortunately, we have to mash
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* both into the same structure. Fortunately, they are almost the same.
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*
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* The kernel begins at 0xf8000000 and runs to 0xffffffff (although
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* some of this is not actually used). Kernel space, including DVMA
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* space (for now?), is mapped identically into all user contexts.
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* There is no point in duplicating this mapping in each user process
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* so they do not appear in the user structures.
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*
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* User space begins at 0x00000000 and runs through 0x1fffffff,
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* then has a `hole', then resumes at 0xe0000000 and runs until it
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* hits the kernel space at 0xf8000000. This can be mapped
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* contiguously by ignorning the top two bits and pretending the
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* space goes from 0 to 37ffffff. Typically the lower range is
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* used for text+data and the upper for stack, but the code here
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* makes no such distinction.
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*
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* Since each virtual segment covers 256 kbytes, the user space
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* requires 3584 segments, while the kernel (including DVMA) requires
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* only 512 segments.
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*
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* The segment map entry for virtual segment vseg is offset in
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* pmap->pm_rsegmap by 0 if pmap is not the kernel pmap, or by
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* NUSEG if it is. We keep a pointer called pmap->pm_segmap
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* pre-offset by this value. pmap->pm_segmap thus contains the
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* values to be loaded into the user portion of the hardware segment
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* map so as to reach the proper PMEGs within the MMU. The kernel
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* mappings are `set early' and are always valid in every context
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* (every change is always propagated immediately).
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*
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* The PMEGs within the MMU are loaded `on demand'; when a PMEG is
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* taken away from context `c', the pmap for context c has its
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* corresponding pm_segmap[vseg] entry marked invalid (the MMU segment
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* map entry is also made invalid at the same time). Thus
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* pm_segmap[vseg] is the `invalid pmeg' number (127 or 511) whenever
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* the corresponding PTEs are not actually in the MMU. On the other
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* hand, pm_pte[vseg] is NULL only if no pages in that virtual segment
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* are in core; otherwise it points to a copy of the 32 or 64 PTEs that
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* must be loaded in the MMU in order to reach those pages.
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* pm_npte[vseg] counts the number of valid pages in each vseg.
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*
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* XXX performance: faster to count valid bits?
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*
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* The kernel pmap cannot malloc() PTEs since malloc() will sometimes
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* allocate a new virtual segment. Since kernel mappings are never
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* `stolen' out of the the MMU, we just keep all its PTEs there, and
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* have no software copies. Its mmu entries are nonetheless kept on lists
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* so that the code that fiddles with mmu lists has something to fiddle.
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*/
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#define NKSEG ((int)((-(unsigned)KERNBASE) / NBPSG)) /* i.e., 512 */
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#define NUSEG (4096 - NKSEG) /* i.e., 3584 */
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/* data appearing in both user and kernel pmaps */
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struct pmap {
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union ctxinfo *pm_ctx; /* current context, if any */
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int pm_ctxnum; /* current context's number */
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#if NCPUS > 1
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simple_lock_data_t pm_lock; /* spinlock */
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#endif
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int pm_refcount; /* just what it says */
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struct mmuentry *pm_mmuforw; /* pmap pmeg chain */
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struct mmuentry **pm_mmuback; /* (two way street) */
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void *pm_segstore;
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pmeg_t *pm_segmap; /* points to pm_rsegmap per above */
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u_char *pm_npte; /* points to pm_rnpte */
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int **pm_pte; /* points to pm_rpte */
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int pm_gap_start; /* Starting with this vseg there's */
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int pm_gap_end; /* no valid mapping until here */
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struct pmap_statistics pm_stats; /* pmap statistics */
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};
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/* data appearing only in user pmaps */
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struct usegmap {
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pmeg_t us_segmap[NUSEG]; /* segment map */
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u_char us_npte[NUSEG]; /* number of valid PTEs per seg */
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int *us_pte[NUSEG]; /* points to PTEs for valid segments */
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};
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/* data appearing only in the kernel pmap */
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struct ksegmap {
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pmeg_t ks_segmap[NKSEG]; /* segment map */
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u_char ks_npte[NKSEG]; /* number of valid PTEs per kseg */
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int *ks_pte[NKSEG]; /* always NULL */
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};
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typedef struct pmap *pmap_t;
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#ifdef KERNEL
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#define PMAP_NULL ((pmap_t)0)
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extern struct pmap kernel_pmap_store;
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extern struct ksegmap kernel_segmap_store;
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extern pmap_t kernel_pmap;
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#define PMAP_ACTIVATE(pmap, pcb, iscurproc)
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#define PMAP_DEACTIVATE(pmap, pcb)
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/*
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* Since PTEs also contain type bits, we have to have some way
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* to tell pmap_enter `this is an IO page' or `this is not to
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* be cached'. Since physical addresses are always aligned, we
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* can do this with the low order bits.
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*
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* The ordering below is important: PMAP_PGTYPE << PG_TNC must give
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* exactly the PG_NC and PG_TYPE bits.
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*/
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#define PMAP_OBIO 1 /* tells pmap_enter to use PG_OBIO */
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#define PMAP_VME16 2 /* etc */
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#define PMAP_VME32 3 /* etc */
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#define PMAP_NC 4 /* tells pmap_enter to set PG_NC */
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#define PMAP_TNC 7 /* mask to get PG_TYPE & PG_NC */
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void pmap_bootstrap __P((int nmmu, int nctx));
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void pmap_init __P((vm_offset_t phys_start, vm_offset_t phys_end));
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#endif /* KERNEL */
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#endif /* _SPARC_PMAP_H_ */
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