117 lines
4.8 KiB
C
117 lines
4.8 KiB
C
/* $NetBSD: lpt_pccreg.h,v 1.3 2000/03/18 22:33:03 scw Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Steve C. Woodford.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* MVME147 Parallel Port Register Definitions
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*/
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#ifndef _MVME68K_LPT_PCCREG_H
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#define _MVME68K_LPT_PCCREG_H
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/*
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* The mvme147's PCC chip has two status/control registers for the
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* printer port:
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*
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* PCCREG_PRNT_INTR_CTRL Printer interrupt control register
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* 0 - 2 Interrupt Level
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* 3 Interrupt Enable
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* 4 ACK Polarity. If set, falling edge of ACK generates
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* the interrupt. If clear, rising edge of ACK generates
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* the interrupt.
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* 5 Indicates an ACK interrupt in progress. Cleared by
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* writing a one, or disabling lpt interrupts.
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* 6 Indicates a FAULT interrupt. Set on falling edge
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* of printer's fault signal. Cleared by writing a one.
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* 7 Printer Interrupt in progress. Basically just the
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* logical OR of bits 5 and 6.
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*/
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#define LPI_ENABLE (1 << 3)
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#define LPI_ACKPOL (1 << 4)
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#define LPI_ACKINT (1 << 5)
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#define LPI_FAULTINT (1 << 6)
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#define LPI_INTERRUPT (1 << 7)
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/*
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* PCCREG_PRNT_CONTROL Printer Control Register
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* 0 Selects auto or manual strobe mode. When low, strobe
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* is automatically generated by a write to the printer
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* data register. When set, strobe must be generated
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* manually using bit 2 of this register.
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* 1 Controls strobe timing in auto mode. When low, strobe
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* time is 6.4uS. When high, strobe time is 1.6uS.
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* 2 Controls strobe in manual mode.
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* 3 Control Input Prime signal. When set, Input Prime
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* is activated.
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*
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* Two other registers which are not addressed via the global PCC structure,
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* live at 0xfffe2800. This address is virtualised and passed to the driver
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* in the pcc_attach_args structure:
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*/
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#define LPC_STROBE_MODE (1 << 0)
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#define LPC_FAST_STROBE (1 << 1)
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#define LPC_STROBE (1 << 2)
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#define LPC_INPUT_PRIME (1 << 3)
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#define lpt_control_read() pcc_reg_read(sys_pcc, PCCREG_PRNT_CONTROL)
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#define lpt_control_write(v) pcc_reg_write(sys_pcc, PCCREG_PRNT_CONTROL, v)
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/*
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* Data and status registers appear at the same offset.
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* Write to access the data register. Read to access the status register.
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*/
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#define LPREG_DATA 0x00 /* Write only data register */
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#define LPREG_STATUS 0x00 /* Read only status register */
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#define LPREG_SIZE 0x1
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/*
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* Access macros for the status register
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*/
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#define LPS_BUSY (1 << 3)
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#define LPS_PAPER_EMPTY (1 << 4)
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#define LPS_SELECT (1 << 5)
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#define LPS_FAULT (1 << 6)
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#define LPS_ACK (1 << 7)
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#define lpt_data_write(sc,v) \
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bus_space_write_1((sc)->sc_bust, (sc)->sc_bush, LPREG_DATA, (v))
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#define lpt_status_read(sc) \
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bus_space_read_1((sc)->sc_bust, (sc)->sc_bush, LPREG_STATUS)
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#endif /* _MVME68K_LPT_PCCREG_H */
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