1036 lines
29 KiB
C
1036 lines
29 KiB
C
/* $NetBSD: psycho_bus.c,v 1.3 1999/07/08 18:09:00 thorpej Exp $ */
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/*
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* Copyright (c) 1999 Matthew R. Green
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)sbus.c 8.1 (Berkeley) 6/11/93
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*/
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/*
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* bus space and bus dma support for UltraSPARC `psycho'. this is largely
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* copied from the sbus code.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#define _SPARC_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <sparc64/dev/iommureg.h>
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#include <sparc64/dev/iommuvar.h>
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#include <sparc64/dev/psychoreg.h>
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#include <sparc64/dev/psychovar.h>
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#include <sparc64/sparc64/cache.h>
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#ifdef DEBUG
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#define PDB_BUSMAP 0x1
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#define PDB_BUSDMA 0x2
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#define PDB_INTR 0x4
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int psycho_busdma_debug = 0;
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#define DPRINTF(l, s) do { if (psycho_busdma_debug & l) printf s; } while (0)
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#else
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#define DPRINTF(l, s)
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#endif
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/*
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* here are our bus space and bus dma routines. this is copied from the sbus
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* code.
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*/
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void psycho_enter __P((struct psycho_pbm *, vaddr_t, int64_t, int));
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void psycho_remove __P((struct psycho_pbm *, vaddr_t, size_t));
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int psycho_flush __P((struct psycho_softc *sc));
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static int psycho_bus_mmap __P((bus_space_tag_t, bus_type_t, bus_addr_t,
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int, bus_space_handle_t *));
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static int _psycho_bus_map __P((bus_space_tag_t, bus_type_t, bus_addr_t,
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bus_size_t, int, vaddr_t,
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bus_space_handle_t *));
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static void *psycho_intr_establish __P((bus_space_tag_t, int, int,
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int (*) __P((void *)), void *));
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static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int));
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static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
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static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
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bus_size_t, int));
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static int psycho_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
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bus_size_t alignment, bus_size_t boundary,
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bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
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static void psycho_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs));
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static int psycho_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
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int nsegs, size_t size, caddr_t *kvap, int flags));
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static void psycho_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
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size_t size));
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bus_space_tag_t
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psycho_alloc_bus_tag(pp, type)
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struct psycho_pbm *pp;
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int type;
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{
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struct psycho_softc *sc = pp->pp_sc;
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bus_space_tag_t bt;
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bt = (bus_space_tag_t)
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malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
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if (bt == NULL)
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panic("could not allocate psycho bus tag");
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bzero(bt, sizeof *bt);
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bt->cookie = pp;
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bt->parent = sc->sc_bustag;
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bt->type = type;
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bt->sparc_bus_map = _psycho_bus_map;
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bt->sparc_bus_mmap = psycho_bus_mmap;
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bt->sparc_intr_establish = psycho_intr_establish;
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return (bt);
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}
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bus_dma_tag_t
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psycho_alloc_dma_tag(pp)
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struct psycho_pbm *pp;
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{
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struct psycho_softc *sc = pp->pp_sc;
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bus_dma_tag_t dt, pdt = sc->sc_dmatag;
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dt = (bus_dma_tag_t)
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malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT);
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if (dt == NULL)
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panic("could not allocate psycho dma tag");
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bzero(dt, sizeof *dt);
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dt->_cookie = pp;
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dt->_parent = pdt;
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#define PCOPY(x) dt->x = pdt->x
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PCOPY(_dmamap_create);
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PCOPY(_dmamap_destroy);
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dt->_dmamap_load = psycho_dmamap_load;
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PCOPY(_dmamap_load_mbuf);
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PCOPY(_dmamap_load_uio);
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PCOPY(_dmamap_load_raw);
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dt->_dmamap_unload = psycho_dmamap_unload;
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dt->_dmamap_sync = psycho_dmamap_sync;
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dt->_dmamem_alloc = psycho_dmamem_alloc;
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dt->_dmamem_free = psycho_dmamem_free;
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dt->_dmamem_map = psycho_dmamem_map;
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dt->_dmamem_unmap = psycho_dmamem_unmap;
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PCOPY(_dmamem_mmap);
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#undef PCOPY
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return (dt);
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}
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/*
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* bus space support. <sparc64/dev/psychoreg.h> has a discussion about
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* PCI physical addresses.
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*/
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static int get_childspace __P((int));
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static int
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get_childspace(type)
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int type;
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{
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int ss;
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switch (type) {
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case PCI_CONFIG_BUS_SPACE:
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ss = 0x00;
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break;
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case PCI_IO_BUS_SPACE:
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ss = 0x01;
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break;
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case PCI_MEMORY_BUS_SPACE:
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ss = 0x02;
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break;
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#if 0
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/* we don't do 64 bit memory space */
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case PCI_MEMORY64_BUS_SPACE:
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ss = 0x03;
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break;
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#endif
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default:
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panic("get_childspace: unknown bus type");
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}
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return (ss);
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}
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static int
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_psycho_bus_map(t, btype, offset, size, flags, vaddr, hp)
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bus_space_tag_t t;
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bus_type_t btype;
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bus_addr_t offset;
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bus_size_t size;
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int flags;
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vaddr_t vaddr;
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bus_space_handle_t *hp;
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{
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struct psycho_pbm *pp = t->cookie;
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struct psycho_softc *sc = pp->pp_sc;
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int i, ss;
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DPRINTF(PDB_BUSMAP, ("_psycho_bus_map: type %d off %qx sz %qx flags %d va %p", t->type, offset, size, flags, vaddr));
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ss = get_childspace(t->type);
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DPRINTF(PDB_BUSMAP, (" cspace %d", ss));
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for (i = 0; i < pp->pp_nrange; i++) {
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bus_addr_t paddr;
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if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss)
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continue;
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paddr = pp->pp_range[i].phys_lo + offset;
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paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32);
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DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr space %lx offset %lx paddr %qx\n",
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(long)ss, (long)offset, paddr));
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return (bus_space_map2(sc->sc_bustag, t->type, paddr,
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size, flags, vaddr, hp));
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}
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DPRINTF(PDB_BUSMAP, (" FAILED\n"));
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return (EINVAL);
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}
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static int
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psycho_bus_mmap(t, btype, paddr, flags, hp)
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bus_space_tag_t t;
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bus_type_t btype;
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bus_addr_t paddr;
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int flags;
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bus_space_handle_t *hp;
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{
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bus_addr_t offset = paddr;
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struct psycho_pbm *pp = t->cookie;
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struct psycho_softc *sc = pp->pp_sc;
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int i, ss;
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ss = get_childspace(t->type);
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DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: type %d flags %d pa %qx\n", btype, flags, paddr));
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for (i = 0; i < pp->pp_nrange; i++) {
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bus_addr_t paddr;
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if (((pp->pp_range[i].cspace >> 24) & 0x03) != ss)
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continue;
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paddr = pp->pp_range[i].phys_lo + offset;
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paddr |= ((bus_addr_t)pp->pp_range[i].phys_hi<<32);
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DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr space %lx offset %lx paddr %qx\n",
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(long)ss, (long)offset, paddr));
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return (bus_space_mmap(sc->sc_bustag, 0, paddr,
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flags, hp));
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}
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return (-1);
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}
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/*
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* interrupt mapping.
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*
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* this table is from the UltraSPARC IIi users manual, table 11-4.
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* we may not need it.
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*/
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int ino_to_ipl_table[] = {
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7, /* PCI A, Slot 0, INTA# */
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5, /* PCI A, Slot 0, INTB# */
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5, /* PCI A, Slot 0, INTC# */
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2, /* PCI A, Slot 0, INTD# */
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7, /* PCI A, Slot 1, INTA# */
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5, /* PCI A, Slot 1, INTB# */
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5, /* PCI A, Slot 1, INTC# */
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2, /* PCI A, Slot 1, INTD# */
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6, /* PCI A, Slot 2, INTA# (unavailable) */
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5, /* PCI A, Slot 2, INTB# (unavailable) */
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2, /* PCI A, Slot 2, INTC# (unavailable) */
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1, /* PCI A, Slot 2, INTD# (unavailable) */
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6, /* PCI A, Slot 3, INTA# (unavailable) */
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4, /* PCI A, Slot 3, INTB# (unavailable) */
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2, /* PCI A, Slot 3, INTC# (unavailable) */
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1, /* PCI A, Slot 3, INTD# (unavailable) */
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6, /* PCI B, Slot 0, INTA# */
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4, /* PCI B, Slot 0, INTB# */
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3, /* PCI B, Slot 0, INTC# */
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1, /* PCI B, Slot 0, INTD# */
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6, /* PCI B, Slot 1, INTA# */
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4, /* PCI B, Slot 1, INTB# */
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3, /* PCI B, Slot 1, INTC# */
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1, /* PCI B, Slot 1, INTD# */
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6, /* PCI B, Slot 2, INTA# */
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4, /* PCI B, Slot 2, INTB# */
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3, /* PCI B, Slot 2, INTC# */
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1, /* PCI B, Slot 2, INTD# */
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6, /* PCI B, Slot 3, INTA# */
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4, /* PCI B, Slot 3, INTB# */
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3, /* PCI B, Slot 3, INTC# */
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1, /* PCI B, Slot 3, INTD# */
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3, /* SCSI */
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3, /* Ethernet */
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2, /* Parallel */
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8, /* Audio Record */
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7, /* Audio Playback */
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8, /* Power Fail */
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7, /* Keyboard/Mouse/Serial */
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8, /* Floppy */
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2, /* Spare 1 */
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4, /* Keyboard */
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4, /* Mouse */
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7, /* Serial */
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0, /* Reserved */
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0, /* Reserved */
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8, /* Uncorrectable ECC error */
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8, /* Correctable ECC error */
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8, /* PCI bus error */
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0, /* Reserved */
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0, /* Reserved */
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};
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int
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psycho_intr_map(tag, pin, line, ihp)
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pcitag_t tag;
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int pin;
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int line;
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pci_intr_handle_t *ihp;
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{
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if (line < 0 || line > 0x32)
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panic("psycho_intr_map: line line < 0 || line > 0x32");
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(*ihp) = line; /* XXX should be right */
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return (0);
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}
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/*
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* install an interrupt handler for a PCI device
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*/
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void *
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psycho_intr_establish(t, level, flags, handler, arg)
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bus_space_tag_t t;
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int level;
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int flags;
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int (*handler) __P((void *));
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void *arg;
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{
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struct psycho_pbm *pp = t->cookie;
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struct psycho_softc *sc = pp->pp_sc;
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struct intrhand *ih;
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int ino;
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long vec = level;
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ih = (struct intrhand *)
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malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT);
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if (ih == NULL)
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return (NULL);
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DPRINTF(PDB_INTR, ("\npsycho_intr_establish: level %x", level));
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ino = INTINO(vec);
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DPRINTF(PDB_INTR, (" ino %x", ino));
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if ((flags & BUS_INTR_ESTABLISH_SOFTINTR) == 0) {
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int64_t *intrmapptr, *intrclrptr;
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int64_t intrmap = 0;
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int i;
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DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %lx\nHunting for IRQ...\n",
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(long)ino, intrlev[ino]));
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if ((ino & INTMAP_OBIO) == 0) {
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/*
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* there are only 8 PCI interrupt INO's available
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*/
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i = INTPCIINOX(vec);
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intrmapptr = &((&sc->sc_regs->pcia_slot0_int)[i]);
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intrclrptr = &sc->sc_regs->pcia0_clr_int[i<<2];
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DPRINTF(PDB_INTR, ("- turning on PCI intr %d", i));
|
|
} else {
|
|
/*
|
|
* there are INTPCI_MAXOBINO (0x16) OBIO interrupts
|
|
* available here (i think).
|
|
*/
|
|
i = INTPCIOBINOX(vec);
|
|
if (i > INTPCI_MAXOBINO)
|
|
panic("ino %d", vec);
|
|
|
|
intrmapptr = &((&sc->sc_regs->scsi_int_map)[i]);
|
|
intrclrptr = &((&sc->sc_regs->scsi_clr_int)[i]);
|
|
|
|
DPRINTF(PDB_INTR, ("- turning on OBIO intr %d", i));
|
|
}
|
|
|
|
/* Register the map and clear intr registers */
|
|
ih->ih_map = intrmapptr;
|
|
ih->ih_clr = intrclrptr;
|
|
|
|
/*
|
|
* Read the current value as we can't change it besides the
|
|
* valid bit so so make sure only this bit is changed.
|
|
*/
|
|
intrmap = *intrmapptr;
|
|
DPRINTF(PDB_INTR, ("; read intrmap = %016qx", intrmap));
|
|
|
|
/* Enable the interrupt */
|
|
intrmap |= INTMAP_V;
|
|
DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr));
|
|
DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", intrmap));
|
|
*intrmapptr = intrmap;
|
|
DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", (intrmap = *intrmapptr)));
|
|
}
|
|
#ifdef DEBUG
|
|
if (psycho_busdma_debug & PDB_INTR) { long i; for (i=0; i<500000000; i++); }
|
|
#endif
|
|
|
|
ih->ih_fun = handler;
|
|
ih->ih_arg = arg;
|
|
ih->ih_number = ino;
|
|
ih->ih_pil = ino_to_ipl_table[ino];
|
|
DPRINTF(PDB_INTR, ("; installing handler %p with ino %u pil %u\n", handler, (u_int)ino, (u_int)ih->ih_pil));
|
|
intr_establish(ih->ih_pil, ih);
|
|
return (ih);
|
|
}
|
|
|
|
/* XXXMRG XXXMRG XXXMRG everything below here looks OK .. needs testing etc..*/
|
|
|
|
/*
|
|
* Here are the iommu control routines.
|
|
*/
|
|
void
|
|
psycho_enter(pp, va, pa, flags)
|
|
struct psycho_pbm *pp;
|
|
vaddr_t va;
|
|
int64_t pa;
|
|
int flags;
|
|
{
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
int64_t tte;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (va < sc->sc_is.is_dvmabase)
|
|
panic("psycho_enter: va 0x%lx not in DVMA space",va);
|
|
#endif
|
|
|
|
tte = MAKEIOTTE(pa, !(flags&BUS_DMA_NOWRITE), !(flags&BUS_DMA_NOCACHE),
|
|
!(flags&BUS_DMA_COHERENT));
|
|
|
|
/* Is the streamcache flush really needed? */
|
|
bus_space_write_8(sc->sc_bustag,
|
|
&sc->sc_is.is_sb->strbuf_pgflush, 0, va);
|
|
psycho_flush(sc);
|
|
DPRINTF(PDB_BUSDMA, ("Clearing TSB slot %d for va %p\n", (int)IOTSBSLOT(va,sc->sc_is.is_tsbsize), va));
|
|
sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)] = tte;
|
|
bus_space_write_8(sc->sc_bustag,
|
|
&sc->sc_regs->psy_iommu.iommu_flush, 0, va);
|
|
DPRINTF(PDB_BUSDMA, ("psycho_enter: va %lx pa %lx TSB[%lx]@%p=%lx\n",
|
|
va, (long)pa, IOTSBSLOT(va,sc->sc_is.is_tsbsize),
|
|
&sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)],
|
|
(long)tte));
|
|
}
|
|
|
|
/*
|
|
* psycho_clear: clears mappings created by psycho_enter
|
|
*
|
|
* Only demap from IOMMU if flag is set.
|
|
*/
|
|
void
|
|
psycho_remove(pp, va, len)
|
|
struct psycho_pbm *pp;
|
|
vaddr_t va;
|
|
size_t len;
|
|
{
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (va < sc->sc_is.is_dvmabase)
|
|
panic("psycho_remove: va 0x%lx not in BUSDMA space", (long)va);
|
|
if ((long)(va + len) < (long)va)
|
|
panic("psycho_remove: va 0x%lx + len 0x%lx wraps",
|
|
(long) va, (long) len);
|
|
if (len & ~0xfffffff)
|
|
panic("psycho_remove: rediculous len 0x%lx", (long)len);
|
|
#endif
|
|
|
|
va = trunc_page(va);
|
|
while (len > 0) {
|
|
|
|
/*
|
|
* Streaming buffer flushes:
|
|
*
|
|
* 1 Tell strbuf to flush by storing va to strbuf_pgflush
|
|
* If we're not on a cache line boundary (64-bits):
|
|
* 2 Store 0 in flag
|
|
* 3 Store pointer to flag in flushsync
|
|
* 4 wait till flushsync becomes 0x1
|
|
*
|
|
* If it takes more than .5 sec, something went wrong.
|
|
*/
|
|
DPRINTF(PDB_BUSDMA, ("psycho_remove: flushing va %p TSB[%lx]@%p=%lx, %lu bytes left\n",
|
|
(long)va, (long)IOTSBSLOT(va,sc->sc_is.is_tsbsize),
|
|
(long)&sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)],
|
|
(long)(sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)]),
|
|
(u_long)len));
|
|
bus_space_write_8(sc->sc_bustag,
|
|
&sc->sc_is.is_sb->strbuf_pgflush, 0, va);
|
|
if (len <= NBPG) {
|
|
psycho_flush(sc);
|
|
len = 0;
|
|
} else len -= NBPG;
|
|
DPRINTF(PDB_BUSDMA, ("psycho_remove: flushed va %p TSB[%lx]@%p=%lx, %lu bytes left\n",
|
|
(long)va, (long)IOTSBSLOT(va,sc->sc_is.is_tsbsize),
|
|
(long)&sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)],
|
|
(long)(sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)]),
|
|
(u_long)len));
|
|
|
|
sc->sc_is.is_tsb[IOTSBSLOT(va,sc->sc_is.is_tsbsize)] = 0;
|
|
bus_space_write_8(sc->sc_bustag,
|
|
&sc->sc_regs->psy_iommu.iommu_flush, 0, va);
|
|
va += NBPG;
|
|
}
|
|
}
|
|
|
|
int
|
|
psycho_flush(sc)
|
|
struct psycho_softc *sc;
|
|
{
|
|
struct iommu_state *is = &sc->sc_is;
|
|
struct timeval cur, flushtimeout;
|
|
|
|
#define BUMPTIME(t, usec) { \
|
|
register volatile struct timeval *tp = (t); \
|
|
register long us; \
|
|
\
|
|
tp->tv_usec = us = tp->tv_usec + (usec); \
|
|
if (us >= 1000000) { \
|
|
tp->tv_usec = us - 1000000; \
|
|
tp->tv_sec++; \
|
|
} \
|
|
}
|
|
|
|
is->is_flush = 0;
|
|
membar_sync();
|
|
bus_space_write_8(sc->sc_bustag, &is->is_sb->strbuf_flushsync, 0, is->is_flushpa);
|
|
membar_sync();
|
|
|
|
microtime(&flushtimeout);
|
|
cur = flushtimeout;
|
|
BUMPTIME(&flushtimeout, 500000); /* 1/2 sec */
|
|
|
|
DPRINTF(PDB_BUSDMA, ("psycho_flush: flush = %lx at va = %lx pa = %lx now=%lx:%lx until = %lx:%lx\n",
|
|
(long)is->is_flush, (long)&is->is_flush,
|
|
(long)is->is_flushpa, cur.tv_sec, cur.tv_usec,
|
|
flushtimeout.tv_sec, flushtimeout.tv_usec));
|
|
/* Bypass non-coherent D$ */
|
|
while (!ldxa(is->is_flushpa, ASI_PHYS_CACHED) &&
|
|
((cur.tv_sec <= flushtimeout.tv_sec) &&
|
|
(cur.tv_usec <= flushtimeout.tv_usec)))
|
|
microtime(&cur);
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (!is->is_flush) {
|
|
printf("psycho_flush: flush timeout %p at %p\n", (long)is->is_flush,
|
|
(long)is->is_flushpa); /* panic? */
|
|
#ifdef DDB
|
|
Debugger();
|
|
#endif
|
|
}
|
|
#endif
|
|
DPRINTF(PDB_BUSDMA, ("psycho_flush: flushed\n"));
|
|
return (is->is_flush);
|
|
}
|
|
|
|
/*
|
|
* bus dma support -- XXXMRG this looks mostly OK.
|
|
*/
|
|
int
|
|
psycho_dmamap_load(t, map, buf, buflen, p, flags)
|
|
bus_dma_tag_t t;
|
|
bus_dmamap_t map;
|
|
void *buf;
|
|
bus_size_t buflen;
|
|
struct proc *p;
|
|
int flags;
|
|
{
|
|
#if 1
|
|
int s;
|
|
#endif
|
|
int err;
|
|
bus_size_t sgsize;
|
|
paddr_t curaddr;
|
|
u_long dvmaddr;
|
|
vaddr_t vaddr = (vaddr_t)buf;
|
|
pmap_t pmap;
|
|
struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie;
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
|
|
if (map->dm_nsegs) {
|
|
/* Already in use?? */
|
|
#ifdef DIAGNOSTIC
|
|
printf("psycho_dmamap_load: map still in use\n");
|
|
#endif
|
|
bus_dmamap_unload(t, map);
|
|
}
|
|
#if 1
|
|
/*
|
|
* Make sure that on error condition we return "no valid mappings".
|
|
*/
|
|
map->dm_nsegs = 0;
|
|
|
|
if (buflen > map->_dm_size) {
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_load(): error %d > %d -- map size exceeded!\n", buflen, map->_dm_size));
|
|
return (EINVAL);
|
|
}
|
|
|
|
sgsize = round_page(buflen + ((int)vaddr & PGOFSET));
|
|
|
|
/*
|
|
* XXX Need to implement "don't dma across this boundry".
|
|
*/
|
|
|
|
s = splhigh();
|
|
err = extent_alloc(sc->sc_is.is_dvmamap, sgsize, NBPG,
|
|
map->_dm_boundary, EX_NOWAIT, (u_long *)&dvmaddr);
|
|
splx(s);
|
|
|
|
if (err != 0)
|
|
return (err);
|
|
|
|
#ifdef DEBUG
|
|
if (dvmaddr == (bus_addr_t)-1)
|
|
{
|
|
printf("psycho_dmamap_load(): dvmamap_alloc(%d, %x) failed!\n", sgsize, flags);
|
|
Debugger();
|
|
}
|
|
#endif
|
|
if (dvmaddr == (bus_addr_t)-1)
|
|
return (ENOMEM);
|
|
|
|
/*
|
|
* We always use just one segment.
|
|
*/
|
|
map->dm_mapsize = buflen;
|
|
map->dm_nsegs = 1;
|
|
map->dm_segs[0].ds_addr = dvmaddr + (vaddr & PGOFSET);
|
|
map->dm_segs[0].ds_len = sgsize;
|
|
|
|
#else
|
|
if ((err = bus_dmamap_load(t->_parent, map, buf, buflen, p, flags)))
|
|
return (err);
|
|
#endif
|
|
|
|
if (p != NULL)
|
|
pmap = p->p_vmspace->vm_map.pmap;
|
|
else
|
|
pmap = pmap_kernel();
|
|
|
|
dvmaddr = trunc_page(map->dm_segs[0].ds_addr);
|
|
sgsize = round_page(buflen + ((int)vaddr & PGOFSET));
|
|
for (; buflen > 0; ) {
|
|
/*
|
|
* Get the physical address for this page.
|
|
*/
|
|
if (pmap_extract(pmap, (vaddr_t)vaddr, &curaddr) == FALSE) {
|
|
bus_dmamap_unload(t, map);
|
|
return (-1);
|
|
}
|
|
|
|
/*
|
|
* Compute the segment size, and adjust counts.
|
|
*/
|
|
sgsize = NBPG - ((u_long)vaddr & PGOFSET);
|
|
if (buflen < sgsize)
|
|
sgsize = buflen;
|
|
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_load: map %p loading va %lx at pa %lx\n",
|
|
map, (long)dvmaddr, (long)(curaddr & ~(NBPG-1))));
|
|
psycho_enter(pp, trunc_page(dvmaddr), trunc_page(curaddr), flags);
|
|
|
|
dvmaddr += PAGE_SIZE;
|
|
vaddr += sgsize;
|
|
buflen -= sgsize;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
psycho_dmamap_unload(t, map)
|
|
bus_dma_tag_t t;
|
|
bus_dmamap_t map;
|
|
{
|
|
vaddr_t addr;
|
|
int len;
|
|
#if 1
|
|
int error, s;
|
|
bus_addr_t dvmaddr;
|
|
bus_size_t sgsize;
|
|
#endif
|
|
struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie;
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
|
|
if (map->dm_nsegs != 1)
|
|
panic("psycho_dmamap_unload: nsegs = %d", map->dm_nsegs);
|
|
|
|
addr = trunc_page(map->dm_segs[0].ds_addr);
|
|
len = map->dm_segs[0].ds_len;
|
|
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_unload: map %p removing va %lx size %lx\n",
|
|
map, (long)addr, (long)len));
|
|
psycho_remove(pp, addr, len);
|
|
#if 1
|
|
dvmaddr = (map->dm_segs[0].ds_addr & ~PGOFSET);
|
|
sgsize = map->dm_segs[0].ds_len;
|
|
|
|
/* Mark the mappings as invalid. */
|
|
map->dm_mapsize = 0;
|
|
map->dm_nsegs = 0;
|
|
|
|
/* Unmapping is bus dependent */
|
|
s = splhigh();
|
|
error = extent_free(sc->sc_is.is_dvmamap, dvmaddr, sgsize, EX_NOWAIT);
|
|
splx(s);
|
|
if (error != 0)
|
|
printf("warning: %qd of DVMA space lost\n", (long long)sgsize);
|
|
cache_flush((caddr_t)dvmaddr, (u_int) sgsize);
|
|
#else
|
|
bus_dmamap_unload(t->_parent, map);
|
|
#endif
|
|
}
|
|
|
|
void
|
|
psycho_dmamap_sync(t, map, offset, len, ops)
|
|
bus_dma_tag_t t;
|
|
bus_dmamap_t map;
|
|
bus_addr_t offset;
|
|
bus_size_t len;
|
|
int ops;
|
|
{
|
|
struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie;
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
vaddr_t va = map->dm_segs[0].ds_addr + offset;
|
|
|
|
/*
|
|
* We only support one DMA segment; supporting more makes this code
|
|
* too unweildy.
|
|
*/
|
|
|
|
if (ops & BUS_DMASYNC_PREREAD) {
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_sync: syncing va %p len %lu BUS_DMASYNC_PREREAD\n",
|
|
(long)va, (u_long)len));
|
|
|
|
/* Nothing to do */;
|
|
}
|
|
if (ops & BUS_DMASYNC_POSTREAD) {
|
|
/*
|
|
* We should sync the IOMMU streaming caches here first.
|
|
*/
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_sync: syncing va %p len %lu BUS_DMASYNC_POSTREAD\n",
|
|
(long)va, (u_long)len));
|
|
while (len > 0) {
|
|
|
|
/*
|
|
* Streaming buffer flushes:
|
|
*
|
|
* 1 Tell strbuf to flush by storing va to strbuf_pgflush
|
|
* If we're not on a cache line boundary (64-bits):
|
|
* 2 Store 0 in flag
|
|
* 3 Store pointer to flag in flushsync
|
|
* 4 wait till flushsync becomes 0x1
|
|
*
|
|
* If it takes more than .5 sec, something went wrong.
|
|
*/
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_sync: flushing va %p, %lu bytes left\n",
|
|
(long)va, (u_long)len));
|
|
bus_space_write_8(sc->sc_bustag,
|
|
&sc->sc_is.is_sb->strbuf_pgflush, 0, va);
|
|
if (len <= NBPG) {
|
|
psycho_flush(sc);
|
|
len = 0;
|
|
} else
|
|
len -= NBPG;
|
|
va += NBPG;
|
|
}
|
|
}
|
|
if (ops & BUS_DMASYNC_PREWRITE) {
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_sync: syncing va %p len %lu BUS_DMASYNC_PREWRITE\n",
|
|
(long)va, (u_long)len));
|
|
/* Nothing to do */;
|
|
}
|
|
if (ops & BUS_DMASYNC_POSTWRITE) {
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamap_sync: syncing va %p len %lu BUS_DMASYNC_POSTWRITE\n",
|
|
(long)va, (u_long)len));
|
|
/* Nothing to do */;
|
|
}
|
|
bus_dmamap_sync(t->_parent, map, offset, len, ops);
|
|
}
|
|
|
|
int
|
|
psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
|
|
bus_dma_tag_t t;
|
|
bus_size_t size, alignment, boundary;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
int *rsegs;
|
|
int flags;
|
|
{
|
|
paddr_t curaddr;
|
|
u_long dvmaddr;
|
|
vm_page_t m;
|
|
struct pglist *mlist;
|
|
int error;
|
|
int n, s;
|
|
struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie;
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
|
|
if ((error = bus_dmamem_alloc(t->_parent, size, alignment,
|
|
boundary, segs, nsegs, rsegs, flags)))
|
|
return (error);
|
|
|
|
/*
|
|
* Allocate a DVMA mapping for our new memory.
|
|
*/
|
|
for (n = 0; n < *rsegs; n++) {
|
|
#if 1
|
|
s = splhigh();
|
|
if (extent_alloc(sc->sc_is.is_dvmamap, segs[0].ds_len, alignment,
|
|
boundary, EX_NOWAIT, (u_long *)&dvmaddr)) {
|
|
splx(s);
|
|
/* Free what we got and exit */
|
|
bus_dmamem_free(t->_parent, segs, nsegs);
|
|
return (ENOMEM);
|
|
}
|
|
splx(s);
|
|
#else
|
|
dvmaddr = dvmamap_alloc(segs[0].ds_len, flags);
|
|
dvmaddr = dvmamap_alloc(segs[0].ds_len, flags);
|
|
if (dvmaddr == (bus_addr_t)-1) {
|
|
/* Free what we got and exit */
|
|
bus_dmamem_free(t->_parent, segs, nsegs);
|
|
return (ENOMEM);
|
|
}
|
|
#endif
|
|
segs[n].ds_addr = dvmaddr;
|
|
size = segs[n].ds_len;
|
|
mlist = segs[n]._ds_mlist;
|
|
|
|
/* Map memory into DVMA space */
|
|
for (m = mlist->tqh_first; m != NULL; m = m->pageq.tqe_next) {
|
|
curaddr = VM_PAGE_TO_PHYS(m);
|
|
DPRINTF(PDB_BUSDMA, ("psycho_dmamem_alloc: map %p loading va %lx at pa %lx\n",
|
|
(long)m, (long)dvmaddr, (long)(curaddr & ~(NBPG-1))));
|
|
psycho_enter(pp, dvmaddr, curaddr, flags);
|
|
dvmaddr += PAGE_SIZE;
|
|
}
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
psycho_dmamem_free(t, segs, nsegs)
|
|
bus_dma_tag_t t;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
{
|
|
vaddr_t addr;
|
|
int len;
|
|
int n, s, error;
|
|
struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie;
|
|
struct psycho_softc *sc = pp->pp_sc;
|
|
|
|
for (n = 0; n < nsegs; n++) {
|
|
addr = segs[n].ds_addr;
|
|
len = segs[n].ds_len;
|
|
psycho_remove(pp, addr, len);
|
|
#if 1
|
|
s = splhigh();
|
|
error = extent_free(sc->sc_is.is_dvmamap, addr, len, EX_NOWAIT);
|
|
splx(s);
|
|
if (error != 0)
|
|
printf("warning: %ld of DVMA space lost\n", (long)len);
|
|
#else
|
|
dvmamap_free(addr, len);
|
|
#endif
|
|
}
|
|
bus_dmamem_free(t->_parent, segs, nsegs);
|
|
}
|
|
|
|
/*
|
|
* Map the DVMA mappings into the kernel pmap.
|
|
* Check the flags to see whether we're streaming or coherent.
|
|
*/
|
|
int
|
|
psycho_dmamem_map(t, segs, nsegs, size, kvap, flags)
|
|
bus_dma_tag_t t;
|
|
bus_dma_segment_t *segs;
|
|
int nsegs;
|
|
size_t size;
|
|
caddr_t *kvap;
|
|
int flags;
|
|
{
|
|
vm_page_t m;
|
|
vaddr_t va;
|
|
bus_addr_t addr;
|
|
struct pglist *mlist;
|
|
int cbit;
|
|
|
|
/*
|
|
* digest flags:
|
|
*/
|
|
cbit = 0;
|
|
if (flags & BUS_DMA_COHERENT) /* Disable vcache */
|
|
cbit |= PMAP_NVC;
|
|
if (flags & BUS_DMA_NOCACHE) /* sideffects */
|
|
cbit |= PMAP_NC;
|
|
/*
|
|
* Now take this and map it into the CPU since it should already
|
|
* be in the the IOMMU.
|
|
*/
|
|
*kvap = (caddr_t)va = segs[0].ds_addr;
|
|
mlist = segs[0]._ds_mlist;
|
|
for (m = mlist->tqh_first; m != NULL; m = m->pageq.tqe_next) {
|
|
|
|
if (size == 0)
|
|
panic("psycho_dmamem_map: size botch");
|
|
|
|
addr = VM_PAGE_TO_PHYS(m);
|
|
pmap_enter(pmap_kernel(), va, addr | cbit,
|
|
VM_PROT_READ | VM_PROT_WRITE, TRUE, 0);
|
|
va += PAGE_SIZE;
|
|
size -= PAGE_SIZE;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Unmap DVMA mappings from kernel
|
|
*/
|
|
void
|
|
psycho_dmamem_unmap(t, kva, size)
|
|
bus_dma_tag_t t;
|
|
caddr_t kva;
|
|
size_t size;
|
|
{
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if ((u_long)kva & PGOFSET)
|
|
panic("psycho_dmamem_unmap");
|
|
#endif
|
|
|
|
size = round_page(size);
|
|
pmap_remove(pmap_kernel(), (vaddr_t)kva, size);
|
|
}
|