441 lines
12 KiB
C
441 lines
12 KiB
C
/* $NetBSD: pci_machdep.c,v 1.3 1999/06/05 21:58:17 eeh Exp $ */
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/*
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* Copyright (c) 1999 Matthew R. Green
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* functions expected by the MI PCI code.
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*/
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#undef DEBUG
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#define DEBUG
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#ifdef DEBUG
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#define SPDB_CONF 0x01
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#define SPDB_INTR 0x04
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#define SPDB_INTMAP 0x08
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#define SPDB_INTFIX 0x10
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int sparc_pci_debug = 0x4;
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#define DPRINTF(l, s) do { if (sparc_pci_debug & l) printf s; } while (0)
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#else
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#define DPRINTF(l, s)
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#endif
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#define _SPARC_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <sparc64/dev/iommureg.h>
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#include <sparc64/dev/iommuvar.h>
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#include <sparc64/dev/psychoreg.h>
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#include <sparc64/dev/psychovar.h>
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/* this is a base to be copied */
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struct sparc_pci_chipset _sparc_pci_chipset = {
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NULL,
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};
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/* commonly used */
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#define TAG2BUS(tag) ((tag) >> 16) & 0xff;
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#define TAG2DEV(tag) ((tag) >> 11) & 0x1f;
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#define TAG2FN(tag) ((tag) >> 8) & 0x7;
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/*
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* functions provided to the MI code.
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*/
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void
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pci_attach_hook(parent, self, pba)
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struct device *parent;
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struct device *self;
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struct pcibus_attach_args *pba;
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{
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pci_chipset_tag_t pc = pba->pba_pc;
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struct psycho_pbm *pp = pc->cookie;
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struct psycho_registers *pr;
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pcitag_t tag;
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char *name, *devtype;
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u_int32_t hi, mid, lo, intr;
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u_int32_t dev, fn, bus;
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int node, i, n, *ip, *ap;
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DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\npci_attach_hook:"));
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/*
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* ok, here we look in the OFW for each PCI device and fix it's
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* "interrupt line" register to be useful.
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*/
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for (node = firstchild(pc->node); node; node = nextsibling(node)) {
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pr = NULL;
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ip = ap = NULL;
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/*
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* ok, for each child we get the "interrupts" property,
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* which contains a value to match against later.
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* XXX deal with multiple "interrupts" values XXX.
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* then we get the "assigned-addresses" property which
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* contains, in the first entry, the PCI bus, device and
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* function associated with this node, which we use to
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* generate a pcitag_t to use pci_conf_read() and
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* pci_conf_write(). next, we get the 'reg" property
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* which is structured like the following:
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* u_int32_t phys_hi;
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* u_int32_t phys_mid;
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* u_int32_t phys_lo;
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* u_int32_t size_hi;
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* u_int32_t size_lo;
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* we mask these values with the "interrupt-map-mask"
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* property of our parent and them compare with each
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* entry in the "interrupt-map" property (also of our
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* parent) which is structred like the following:
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* u_int32_t phys_hi;
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* u_int32_t phys_mid;
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* u_int32_t phys_lo;
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* u_int32_t intr;
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* int32_t child_node;
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* u_int32_t child_intr;
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* if there is an exact match with phys_hi, phys_mid,
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* phys_lo and the interrupt, we have a match and we
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* know that this interrupt's value is really the
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* child_intr of the interrupt map entry. we put this
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* into the PCI interrupt line register so that when
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* the driver for this node wants to attach, we know
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* it's INO already.
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*/
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name = getpropstring(node, "name");
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DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\tnode %x name `%s'", node, name));
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devtype = getpropstring(node, "device_type");
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DPRINTF((SPDB_INTFIX|SPDB_INTMAP), (" devtype `%s':", devtype));
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/* ignore PCI bridges, we'll get them later */
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if (strcmp(devtype, "pci") == 0)
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continue;
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/* if there isn't any "interrupts" then we don't care to fix it */
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ip = NULL;
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if (getprop(node, "interrupts", sizeof(int), &n, (void **)&ip))
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continue;
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DPRINTF(SPDB_INTFIX, (" got interrupts"));
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/* and if there isn't an "assigned-addresses" we can't find b/d/f */
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if (getprop(node, "assigned-addresses", sizeof(int), &n,
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(void **)&ap))
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goto clean1;
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DPRINTF(SPDB_INTFIX, (" got assigned-addresses"));
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/* ok, and now the "reg" property, so we know what we're talking about. */
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if (getprop(node, "reg", sizeof(*pr), &n,
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(void **)&pr))
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goto clean2;
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DPRINTF(SPDB_INTFIX, (" got reg"));
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bus = TAG2BUS(ap[0]);
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dev = TAG2DEV(ap[0]);
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fn = TAG2FN(ap[0]);
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DPRINTF(SPDB_INTFIX, ("; bus %u dev %u fn %u", bus, dev, fn));
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tag = pci_make_tag(pc, bus, dev, fn);
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DPRINTF(SPDB_INTFIX, ("; tag %08x\n\t; reg: hi %x mid %x lo %x intr %x", tag, pr->phys_hi, pr->phys_mid, pr->phys_lo, *ip));
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DPRINTF(SPDB_INTFIX, ("\n\t; intmapmask: hi %x mid %x lo %x intr %x", pp->pp_intmapmask.phys_hi, pp->pp_intmapmask.phys_mid,
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pp->pp_intmapmask.phys_lo, pp->pp_intmapmask.intr));
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hi = pr->phys_hi & pp->pp_intmapmask.phys_hi;
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mid = pr->phys_mid & pp->pp_intmapmask.phys_mid;
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lo = pr->phys_lo & pp->pp_intmapmask.phys_lo;
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intr = *ip & pp->pp_intmapmask.intr;
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DPRINTF(SPDB_INTFIX, ("\n\t; after: hi %x mid %x lo %x intr %x", hi, mid, lo, intr));
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for (i = 0; i < pp->pp_nintmap; i++) {
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DPRINTF(SPDB_INTFIX, ("\n\t\tmatching for: hi %x mid %x lo %x intr %x", pp->pp_intmap[i].phys_hi, pp->pp_intmap[i].phys_mid,
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pp->pp_intmap[i].phys_lo, pp->pp_intmap[i].intr));
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if (pp->pp_intmap[i].phys_hi != hi ||
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pp->pp_intmap[i].phys_mid != mid ||
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pp->pp_intmap[i].phys_lo != lo ||
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pp->pp_intmap[i].intr != intr)
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continue;
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DPRINTF(SPDB_INTFIX, ("... BINGO! ..."));
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/*
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* OK! we found match. pull out the old interrupt
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* register, patch in the new value, and put it back.
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*/
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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DPRINTF(SPDB_INTFIX, ("\n\t ; read %x from intreg", intr));
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intr = (intr & ~PCI_INTERRUPT_LINE_MASK) |
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(pp->pp_intmap[i].child_intr & PCI_INTERRUPT_LINE_MASK);
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DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\t ; gonna write %x to intreg", intr));
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pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
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DPRINTF((SPDB_INTFIX|SPDB_INTMAP), ("\n\t ; reread %x from intreg", intr));
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break;
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}
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/* clean up */
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if (pr)
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free(pr, M_DEVBUF);
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clean2:
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if (ap)
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free(ap, M_DEVBUF);
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clean1:
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if (ip)
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free(ip, M_DEVBUF);
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}
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DPRINTF(SPDB_INTFIX, ("\n"));
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}
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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return 32;
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}
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pcitag_t
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pci_make_tag(pc, b, d, f)
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pci_chipset_tag_t pc;
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int b;
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int d;
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int f;
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{
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/* make me a useable offset */
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return (b << 16) | (d << 11) | (f << 8);
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}
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static int confaddr_ok __P((struct psycho_softc *, pcitag_t));
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/*
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* this function is a large hack. ideally, we should also trap accesses
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* properly, but we have to avoid letting anything read various parts
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* of bus 0 dev 0 fn 0 space or the machine may hang. so, even if we
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* do properly implement PCI config access trap handling, this function
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* should remain in place Just In Case.
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*/
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static int
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confaddr_ok(sc, tag)
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struct psycho_softc *sc;
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pcitag_t tag;
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{
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int bus, dev, fn;
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bus = TAG2BUS(tag);
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dev = TAG2DEV(tag);
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fn = TAG2FN(tag);
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if (sc->sc_mode == PSYCHO_MODE_SABRE) {
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/*
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* bus 0 is only ok for dev 0 fn 0, dev 1 fn 0 and dev fn 1.
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*/
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if (bus == 0 &&
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((dev == 0 && fn > 0) ||
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(dev == 1 && fn > 1) ||
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(dev > 1))) {
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DPRINTF(SPDB_CONF, (" confaddr_ok: rejecting bus %d dev %d fn %d -", bus, dev, fn));
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return (0);
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}
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} else if (sc->sc_mode == PSYCHO_MODE_PSYCHO_A ||
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sc->sc_mode == PSYCHO_MODE_PSYCHO_B) {
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/*
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* make sure we are reading our own bus
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*/
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/* XXX??? */
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panic("confaddr_ok: can't do SUNW,psycho yet");
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}
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return (1);
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}
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/* assume we are mapped little-endian/side-effect */
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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struct psycho_pbm *pp = pc->cookie;
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struct psycho_softc *sc = pp->pp_sc;
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u_int32_t data;
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pcireg_t val;
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DPRINTF(SPDB_CONF, ("pci_conf_read: tag %lx; reg %x; ", (long)tag, reg));
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DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x) ...",
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bus_type_asi[sc->sc_configtag->type],
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sc->sc_configaddr + tag + reg, (int)tag + reg));
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if (confaddr_ok(sc, tag) == 0) {
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val = (pcireg_t)~0;
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} else {
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#if 0
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data = probeget(sc->sc_configaddr + tag + reg,
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bus_type_asi[sc->sc_configtag->type], 4);
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if (data == -1)
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val = (pcireg_t)~0;
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else
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val = (pcireg_t)data;
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#else
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membar_sync();
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val = bus_space_read_4(sc->sc_configtag, sc->sc_configaddr,
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tag + reg);
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membar_sync();
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#endif
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}
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DPRINTF(SPDB_CONF, (" returning %08x\n", (u_int)val));
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return (val);
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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struct psycho_pbm *pp = pc->cookie;
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struct psycho_softc *sc = pp->pp_sc;
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DPRINTF(SPDB_CONF, ("pci_conf_write: tag %ld; reg %d; data %d; ", (long)tag, reg, (int)data));
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DPRINTF(SPDB_CONF, ("asi = %x; readaddr = %qx (offset = %x)\n",
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bus_type_asi[sc->sc_configtag->type],
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sc->sc_configaddr + tag + reg, (int)tag + reg));
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if (confaddr_ok(sc, tag) == 0)
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panic("pci_conf_write: bad addr");
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#if 0
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probeset(sc->sc_configaddr + tag + reg,
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bus_type_asi[sc->sc_configtag->type],
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4, data);
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#else
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membar_sync();
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bus_space_write_4(sc->sc_configtag, sc->sc_configaddr, tag + reg, data);
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membar_sync();
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#endif
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}
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/*
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* interrupt mapping foo.
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*/
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int
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pci_intr_map(pc, tag, pin, line, ihp)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int pin;
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int line;
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pci_intr_handle_t *ihp;
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{
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struct psycho_pbm *pp = pc->cookie;
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int rv;
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DPRINTF(SPDB_INTR, ("pci_intr_map: tag %x; pin %d; line %d", (u_int)tag, pin, line));
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if (line == 255 || pin == 0) {
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*ihp = -1;
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rv = 1;
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goto out;
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}
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if (pin > 4)
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panic("pci_intr_map: pin > 4");
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rv = psycho_intr_map(tag, pin, line, ihp);
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out:
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DPRINTF(SPDB_INTR, ("; handle = %d; returning %d\n", (int)*ihp, rv));
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return (rv);
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}
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const char *
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pci_intr_string(pc, ih)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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{
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static char str[16];
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DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
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if (ih < 0 || ih > 0x32) {
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printf("\n"); /* i'm *so* beautiful */
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panic("pci_intr_string: bogus handle\n");
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}
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sprintf(str, "vector %u", ih);
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DPRINTF(SPDB_INTR, ("; returning %s\n", str));
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return (str);
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}
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void *
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pci_intr_establish(pc, ih, level, func, arg)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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int level;
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int (*func) __P((void *));
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void *arg;
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{
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void *cookie;
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struct psycho_pbm *pp = (struct psycho_pbm *)pc->cookie;
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DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d", (u_long)ih, level));
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cookie = bus_intr_establish(pp->pp_memt, ih, 0, func, arg);
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DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
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return (cookie);
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}
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void
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pci_intr_disestablish(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
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/* XXX */
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panic("can't disestablish PCI interrupts yet");
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}
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