243 lines
7.3 KiB
C
243 lines
7.3 KiB
C
/* $NetBSD: dmac.c,v 1.3 2005/12/24 20:07:32 perry Exp $ */
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/*-
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* Copyright (c) 2005 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Steve C. Woodford.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* SH-5 DMA Controller.
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* Currently only used for copy/zero page ops.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: dmac.c,v 1.3 2005/12/24 20:07:32 perry Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <uvm/uvm.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <sh5/dev/superhywayvar.h>
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#include <sh5/dev/dmacreg.h>
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#include "locators.h"
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#define DMAC_PMAP_CHANNEL 0
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struct dmac_softc {
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struct device sc_dev;
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bus_space_tag_t sc_bust;
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bus_dma_tag_t sc_dmat;
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bus_space_handle_t sc_bush;
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#ifdef DMAC_PMAP_CHANNEL
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bus_dmamap_t sc_zero_map;
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bus_dma_segment_t sc_zero_seg;
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caddr_t sc_zero_kva;
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#endif
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};
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static int dmacmatch(struct device *, struct cfdata *, void *);
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static void dmacattach(struct device *, struct device *, void *);
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CFATTACH_DECL(dmac, sizeof(struct dmac_softc),
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dmacmatch, dmacattach, NULL, NULL);
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extern struct cfdriver dmac_cd;
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#ifdef DMAC_PMAP_CHANNEL
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static void dmac_zero_page(void *, paddr_t);
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static void dmac_copy_page(void *, paddr_t, paddr_t);
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#endif
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#define dmac_reg_read(sc,r) \
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bus_space_read_8((sc)->sc_bust, (sc)->sc_bush, (r))
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#define dmac_reg_write(sc,r,v) \
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bus_space_write_8((sc)->sc_bust, (sc)->sc_bush, (r), (v))
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/*ARGSUSED*/
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static int
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dmacmatch(struct device *parent, struct cfdata *cf, void *args)
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{
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struct superhyway_attach_args *sa = args;
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bus_space_handle_t bh;
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u_int64_t vcr;
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if (strcmp(sa->sa_name, dmac_cd.cd_name))
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return (0);
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sa->sa_pport = 0;
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if (bus_space_map(sa->sa_bust,
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SUPERHYWAY_PPORT_TO_BUSADDR(cf->cf_loc[SUPERHYWAYCF_PPORT]),
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SUPERHYWAY_REG_SZ, 0, &bh))
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return (0);
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vcr = bus_space_read_8(sa->sa_bust, bh, SUPERHYWAY_REG_VCR);
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bus_space_unmap(sa->sa_bust, bh, SUPERHYWAY_REG_SZ);
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if (SUPERHYWAY_VCR_MOD_ID(vcr) != DMAC_MODULE_ID)
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return (0);
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sa->sa_pport = cf->cf_loc[SUPERHYWAYCF_PPORT];
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return (1);
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}
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/*ARGSUSED*/
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static void
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dmacattach(struct device *parent, struct device *self, void *args)
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{
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struct dmac_softc *sc = (void *)self;
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struct superhyway_attach_args *sa = args;
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int i;
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#ifdef DMAC_PMAP_CHANNEL
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int error, nsegs;
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#endif
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sc->sc_bust = sa->sa_bust;
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sc->sc_dmat = sa->sa_dmat;
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if (bus_space_map(sa->sa_bust,
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SUPERHYWAY_PPORT_TO_BUSADDR(sa->sa_pport), DMAC_REG_SZ, 0,
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&sc->sc_bush)) {
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aprint_error("%s: Failed to map registers\n",
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sc->sc_dev.dv_xname);
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return;
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}
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aprint_naive(": DMAC\n");
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aprint_normal(": DMA Controller, Version 0x%x\n",
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(int)SUPERHYWAY_VCR_MOD_VERS(dmac_reg_read(sc,SUPERHYWAY_REG_VCR)));
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dmac_reg_write(sc, DMAC_COMMON, 0);
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for (i = 0; i < DMAC_N_CHANNELS; i++)
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dmac_reg_write(sc, DMAC_CTRL(i), 0);
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#ifdef DMAC_PMAP_CHANNEL
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error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0,
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&sc->sc_zero_seg, 1, &nsegs, BUS_DMA_NOWAIT);
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if (error)
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goto error;
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error = bus_dmamem_map(sc->sc_dmat, &sc->sc_zero_seg, 1, PAGE_SIZE,
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&sc->sc_zero_kva, BUS_DMA_NOWAIT);
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if (error)
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goto free_dmamem;
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error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
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BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_zero_map);
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if (error)
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goto unmap_dmamem;
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error = bus_dmamap_load(sc->sc_dmat, sc->sc_zero_map, sc->sc_zero_kva,
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PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
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if (error) {
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bus_dmamap_destroy(sc->sc_dmat, sc->sc_zero_map);
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unmap_dmamem: bus_dmamem_unmap(sc->sc_dmat, sc->sc_zero_kva, PAGE_SIZE);
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free_dmamem: bus_dmamem_free(sc->sc_dmat, &sc->sc_zero_seg, 1);
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error: aprint_error("%s: Failed to allocate zero page (%d)\n",
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sc->sc_dev.dv_xname, error);
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return;
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}
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bus_dmamap_sync(sc->sc_dmat, sc->sc_zero_map, 0, PAGE_SIZE,
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BUS_DMASYNC_PREREAD);
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memset(sc->sc_zero_kva, 0, PAGE_SIZE);
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bus_dmamap_sync(sc->sc_dmat, sc->sc_zero_map, 0, PAGE_SIZE,
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BUS_DMASYNC_PREWRITE);
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pmap_register_copyzero_helpers(dmac_zero_page, dmac_copy_page, sc);
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#endif /* DMAC_PMAP_CHANNEL */
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dmac_reg_write(sc, DMAC_COMMON, DMAC_COMMON_MASTER_ENABLE);
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}
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#ifdef DMAC_PMAP_CHANNEL
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static inline void
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dmac_page_copy_zero(const struct dmac_softc *sc, paddr_t src, paddr_t dst)
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{
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u_int64_t reg;
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dmac_reg_write(sc, DMAC_SAR(DMAC_PMAP_CHANNEL), DMAC_SAR_MASK(src));
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dmac_reg_write(sc, DMAC_DAR(DMAC_PMAP_CHANNEL), DMAC_DAR_MASK(dst));
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dmac_reg_write(sc, DMAC_COUNT(DMAC_PMAP_CHANNEL),
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DMAC_COUNT_MASK(PAGE_SIZE / 32));
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dmac_reg_write(sc, DMAC_CTRL(DMAC_PMAP_CHANNEL),
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DMAC_CTRL_TRANSFER_SIZE_32 |
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DMAC_CTRL_SOURCE_INCREMENT_INC |
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DMAC_CTRL_DESTINATION_INCREMENT_INC |
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DMAC_CTRL_RESOURCE_SELECT_AUTO |
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DMAC_CTRL_TRANSFER_ENABLE);
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/*
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* It takes ~17uS for a PAGE_SIZE transfer to complete. As there
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* isn't much we can do in such a short period of time, we might
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* as well busy-wait.
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*/
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while (((reg = dmac_reg_read(sc, DMAC_STATUS(DMAC_PMAP_CHANNEL))) &
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DMAC_STATUS_TRANSFER_END) == 0)
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;
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dmac_reg_write(sc, DMAC_CTRL(DMAC_PMAP_CHANNEL), 0);
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if (reg & DMAC_STATUS_ADDRESS_ALIGN_ERROR) {
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reg = dmac_reg_read(sc, DMAC_COMMON);
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reg &= ~(DMAC_COMMON_ERROR_RESPONSE(DMAC_PMAP_CHANNEL) |
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DMAC_COMMON_ADDRESS_ALIGNMENT_ERROR(DMAC_PMAP_CHANNEL));
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dmac_reg_write(sc, DMAC_COMMON, reg);
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}
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}
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static void
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dmac_zero_page(void *arg, paddr_t pa)
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{
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struct dmac_softc *sc = arg;
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dmac_page_copy_zero(sc, sc->sc_zero_seg.ds_addr, pa);
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}
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static void
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dmac_copy_page(void *arg, paddr_t src, paddr_t dst)
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{
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struct dmac_softc *sc = arg;
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dmac_page_copy_zero(sc, src, dst);
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}
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#endif /* DMAC_PMAP_CHANNEL */
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