59474a8c82
SH-5, meet NetBSD. Let's hope this is the start of a long and fruitful relationship. :-) This code, funded by Wasabi Systems, adds initial support for the Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD. At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator which has no simulated devices other than a simple console. However, it is good enough to get to the "root device: " prompt. Device driver support for Real SH-5 Hardware is in place, particularly for supporting the up-coming Cayman evaluation board, and should be quite easy to get running when the hardware is available. There is no in-tree toolchain for this port at this time. Gcc-current has rudimentary SH-5 support but it is known to be buggy. A working toolchain was obtained from SuperH to facilitate this port. Gcc-current will be fixed in due course. The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has currently only been tested in 32-bit mode. It is bi-endian, via a boot- time option and it also has an "SHcompact" mode in which it will execute SH-[34] user-land instructions. For more information on the SH-5, see www.superh.com. Suffice to say it is *not* just another respin of the SH-[34].
65 lines
2.7 KiB
C
65 lines
2.7 KiB
C
/* $NetBSD: cprcvar.h,v 1.1 2002/07/05 13:31:51 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH5_CPRCVAR_H
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#define _SH5_CPRCVAR_H
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/*
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* The following structure describes the clock rates of the
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* various clock domains provided by the CPRC module. Clock
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* rates are expressed in Hz values.
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*
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* Other drivers in the system can refer to this to determine
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* their own clock rates as appropriate.
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*
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* XXX: Will need to change the "u_int" to "u_long" should
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* technology improve to the point where we have > 4GHz cpus :)
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*/
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struct cprc_clocks {
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u_int cc_cpu; /* CPU Clock */
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u_int cc_emi; /* External Memory Interface Clock */
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u_int cc_superhyway; /* SuperHyway Clock */
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u_int cc_peripheral; /* Peripheral Bus Clock */
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u_int cc_pci; /* PCI Bus Clock */
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u_int cc_femi; /* Flash External Memory Interface Clock */
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u_int cc_stbus; /* ST Legacy Bus Clock */
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};
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extern struct cprc_clocks cprc_clocks;
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#endif /* _SH5_CPRCVAR_H */
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