59adf08e17
<http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>, divide each machine's bus.h into bus_defs.h (constants & data types) and bus_funcs.h (macro implementations of bus_space(9) routines and MD prototypes). Note that some bus_space(9) routines' implementation will move to .c files from inline subroutines or macros in .h files. I've only made the split for machine architectures where there is PCI. All of the non-PCI-having architectures will require a similar split. These #include files are not referenced by any (committed) Makefiles or header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some more machine-dependent files will dribble in before I throw the switch.
208 lines
6.9 KiB
C
208 lines
6.9 KiB
C
/* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:10:01 dyoung Exp $ */
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/*
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SGIMIPS_BUS_DEFS_H_
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#define _SGIMIPS_BUS_DEFS_H_
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#include <mips/locore.h>
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#define __BUS_SPACE_HAS_STREAM_METHODS
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/*
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* Utility macros; do not use outside this file.
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*/
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#define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS)
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#define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
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/*
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* Bus address and size types
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*/
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typedef uint64_t bus_addr_t;
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typedef uint64_t bus_size_t;
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/*
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* Access methods for bus resources and address space.
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*/
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typedef int bus_space_tag_t;
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typedef u_long bus_space_handle_t;
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/*
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* Values for sgimips bus space tag, not to be used directly by MI code.
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*/
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#define SGIMIPS_BUS_SPACE_NORMAL 0
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#define SGIMIPS_BUS_SPACE_IP6_DPCLOCK 1
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#define SGIMIPS_BUS_SPACE_HPC 2
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#define SGIMIPS_BUS_SPACE_MEM 3
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#define SGIMIPS_BUS_SPACE_MACE 4
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#define SGIMIPS_BUS_SPACE_IO 5
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#define SGIMIPS_BUS_SPACE_CRIME 6
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/*
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* int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
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* bus_size_t size, int flags, bus_space_handle_t *bshp);
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*
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* Map a region of bus space.
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*/
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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#define BUS_SPACE_MAP_PREFETCHABLE 0x04
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
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#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
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#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
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#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
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#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
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#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
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#define BUS_DMA_BUS2 0x020
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#define BUS_DMA_BUS3 0x040
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#define BUS_DMA_BUS4 0x080
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#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
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#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
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#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
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#define SGIMIPS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* Operations performed by bus_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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typedef struct sgimips_bus_dma_tag *bus_dma_tag_t;
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typedef struct sgimips_bus_dmamap *bus_dmamap_t;
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#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct sgimips_bus_dma_segment {
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bus_addr_t ds_addr; /* DMA address */
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bus_size_t ds_len; /* length of transfer */
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vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */
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};
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typedef struct sgimips_bus_dma_segment bus_dma_segment_t;
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct sgimips_bus_dma_tag {
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/*
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* XXX soren O2: 0x40000000
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* ikke endnu (bus.c)
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*/
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#if 0
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bus_addr_t _wbase; /* DMA window base */
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bus_addr_t _wbase_swap; /* DMA window base (byteswapped) */
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#endif
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/*
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* DMA mapping methods.
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*/
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int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
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bus_size_t, bus_size_t, int, bus_dmamap_t *);
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void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
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int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
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bus_size_t, struct proc *, int);
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int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
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struct mbuf *, int);
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int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int);
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int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int);
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void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
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void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
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bus_addr_t, bus_size_t, int);
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/*
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* DMA memory utility functions.
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*/
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int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
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bus_size_t, bus_dma_segment_t *, int, int *, int);
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void (*_dmamem_free)(bus_dma_tag_t,
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bus_dma_segment_t *, int);
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int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
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int, size_t, void **, int);
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void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
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paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
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int, off_t, int, int);
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};
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/*
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* bus_dmamap_t
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*
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* Describes a DMA mapping.
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*/
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struct sgimips_bus_dmamap {
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/*
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* PRIVATE MEMBERS: not for use my machine-independent code.
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*/
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bus_size_t _dm_size; /* largest DMA transfer mappable */
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int _dm_segcnt; /* number of segs this map can map */
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bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
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bus_size_t _dm_boundary; /* don't cross this */
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int _dm_flags; /* misc. flags */
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struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
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/*
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* PUBLIC MEMBERS: these are used by machine-independent code.
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*/
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bus_size_t dm_maxsegsz; /* largest possible segment */
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bus_size_t dm_mapsize; /* size of the mapping */
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int dm_nsegs; /* # valid segments in mapping */
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bus_dma_segment_t dm_segs[1]; /* segments; variable length */
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};
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#endif /* _SGIMIPS_BUS_DEFS_H_ */
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