55 lines
2.1 KiB
C
55 lines
2.1 KiB
C
/* $NetBSD: espvar.h,v 1.4 2008/04/28 20:23:27 martin Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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struct esp_softc {
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struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */
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struct intrhand sc_ih; /* intr handler */
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volatile uint8_t *sc_reg; /* the registers */
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dbdma_regmap_t *sc_dmareg; /* DMA registers */
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dbdma_command_t *sc_dmacmd; /* command area for DMA */
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/* openprom stuff */
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int sc_node; /* PROM node ID */
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int sc_pri; /* SBUS priority */
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size_t sc_dmasize;
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uint8_t **sc_dmaaddr;
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size_t *sc_dmalen;
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int sc_dmaactive;
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int sc_dma_direction;
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};
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#define D_WRITE 1
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