307 lines
9.1 KiB
C
307 lines
9.1 KiB
C
/* $NetBSD: plumpower.c,v 1.9 2002/10/02 05:26:47 thorpej Exp $ */
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/*-
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* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#undef PLUMPOWERDEBUG
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <hpcmips/tx/tx39var.h>
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#include <hpcmips/dev/plumvar.h>
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#include <hpcmips/dev/plumpowervar.h>
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#include <hpcmips/dev/plumpowerreg.h>
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#ifdef PLUMPOWERDEBUG
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int plumpower_debug = 1;
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#define DPRINTF(arg) if (plumpower_debug) printf arg;
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#define DPRINTFN(n, arg) if (plumpower_debug > (n)) printf arg;
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#else
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#define DPRINTF(arg)
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#define DPRINTFN(n, arg)
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#endif
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int plumpower_match(struct device *, struct cfdata *, void *);
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void plumpower_attach(struct device *, struct device *, void *);
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struct plumpower_softc {
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struct device sc_dev;
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plum_chipset_tag_t sc_pc;
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bus_space_tag_t sc_regt;
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bus_space_handle_t sc_regh;
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};
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CFATTACH_DECL(plumpower, sizeof(struct plumpower_softc),
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plumpower_match, plumpower_attach, NULL, NULL);
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#ifdef PLUMPOWERDEBUG
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static void plumpower_dump(struct plumpower_softc *);
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#endif
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int
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plumpower_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return 2; /* 1st attach group */
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}
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void
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plumpower_attach(struct device *parent, struct device *self, void *aux)
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{
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struct plum_attach_args *pa = aux;
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struct plumpower_softc *sc = (void*)self;
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printf("\n");
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sc->sc_pc = pa->pa_pc;
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sc->sc_regt = pa->pa_regt;
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if (bus_space_map(sc->sc_regt, PLUM_POWER_REGBASE,
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PLUM_POWER_REGSIZE, 0, &sc->sc_regh)) {
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printf(": register map failed\n");
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return;
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}
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plum_conf_register_power(sc->sc_pc, (void*)sc);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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/* disable all power/clock */
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plum_conf_write(sc->sc_regt, sc->sc_regh,
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PLUM_POWER_PWRCONT_REG, 0);
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plum_conf_write(sc->sc_regt, sc->sc_regh,
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PLUM_POWER_CLKCONT_REG, 0);
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/* enable MCS interface from TX3922 */
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plum_conf_write(sc->sc_regt, sc->sc_regh, PLUM_POWER_INPENA_REG,
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PLUM_POWER_INPENA);
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}
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void
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plum_power_ioreset(plum_chipset_tag_t pc)
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG,
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PLUM_POWER_RESETC_IO5CL1 |
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PLUM_POWER_RESETC_IO5CL1);
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plum_conf_write(regt, regh, PLUM_POWER_RESETC_REG, 0);
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}
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void*
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plum_power_establish(plum_chipset_tag_t pc, int src)
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t pwrreg, clkreg;
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pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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switch(src) {
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default:
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panic("plum_power_establish: unknown power source");
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case PLUM_PWR_LCD:
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pwrreg |= PLUM_POWER_PWRCONT_LCDPWR;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg |= PLUM_POWER_PWRCONT_LCDDSP;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg |= PLUM_POWER_PWRCONT_LCDOE;
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break;
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case PLUM_PWR_BKL:
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pwrreg |= PLUM_POWER_PWRCONT_BKLIGHT;
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break;
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case PLUM_PWR_IO5:
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/* reset I/O bus (High/Low) */
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plum_power_ioreset(pc);
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/* supply power */
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pwrreg |= PLUM_POWER_PWRCONT_IO5PWR;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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/* output enable & supply clock */
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pwrreg |= PLUM_POWER_PWRCONT_IO5OE;
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clkreg |= PLUM_POWER_CLKCONT_IO5CLK;
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break;
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case PLUM_PWR_EXTPW0:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW0;
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break;
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case PLUM_PWR_EXTPW1:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW1;
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break;
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case PLUM_PWR_EXTPW2:
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pwrreg |= PLUM_POWER_PWRCONT_EXTPW2;
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break;
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case PLUM_PWR_USB:
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/* output enable */
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pwrreg |= PLUM_POWER_PWRCONT_USBEN;
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/* supply clock to the USB host controller */
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clkreg |= PLUM_POWER_CLKCONT_USBCLK1;
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/*
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* clock supply is adaptively controlled by hardware
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* (recommended)
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*/
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clkreg &= ~PLUM_POWER_CLKCONT_USBCLK2;
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break;
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case PLUM_PWR_SM:
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clkreg |= PLUM_POWER_CLKCONT_SMCLK;
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break;
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case PLUM_PWR_PCC1:
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clkreg |= PLUM_POWER_CLKCONT_PCCCLK1;
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break;
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case PLUM_PWR_PCC2:
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clkreg |= PLUM_POWER_CLKCONT_PCCCLK2;
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break;
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}
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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return (void*)src;
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}
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void
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plum_power_disestablish(plum_chipset_tag_t pc, int ph)
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{
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struct plumpower_softc *sc = pc->pc_powert;
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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int src = (int)ph;
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plumreg_t pwrreg, clkreg;
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pwrreg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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clkreg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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switch(src) {
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default:
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panic("plum_power_disestablish: unknown power source");
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case PLUM_PWR_LCD:
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pwrreg &= ~PLUM_POWER_PWRCONT_LCDOE;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg &= ~PLUM_POWER_PWRCONT_LCDDSP;
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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pwrreg &= ~PLUM_POWER_PWRCONT_LCDPWR;
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break;
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case PLUM_PWR_BKL:
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pwrreg &= ~PLUM_POWER_PWRCONT_BKLIGHT;
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break;
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case PLUM_PWR_IO5:
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pwrreg &= ~(PLUM_POWER_PWRCONT_IO5PWR |
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PLUM_POWER_PWRCONT_IO5OE);
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clkreg &= ~PLUM_POWER_CLKCONT_IO5CLK;
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break;
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case PLUM_PWR_EXTPW0:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW0;
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break;
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case PLUM_PWR_EXTPW1:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW1;
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break;
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case PLUM_PWR_EXTPW2:
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pwrreg &= ~PLUM_POWER_PWRCONT_EXTPW2;
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break;
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case PLUM_PWR_USB:
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pwrreg &= ~PLUM_POWER_PWRCONT_USBEN;
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clkreg &= ~(PLUM_POWER_CLKCONT_USBCLK1 |
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PLUM_POWER_CLKCONT_USBCLK2);
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break;
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case PLUM_PWR_SM:
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clkreg &= ~PLUM_POWER_CLKCONT_SMCLK;
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break;
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case PLUM_PWR_PCC1:
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clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK1;
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break;
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case PLUM_PWR_PCC2:
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clkreg &= ~PLUM_POWER_CLKCONT_PCCCLK2;
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break;
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}
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plum_conf_write(regt, regh, PLUM_POWER_PWRCONT_REG, pwrreg);
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plum_conf_write(regt, regh, PLUM_POWER_CLKCONT_REG, clkreg);
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#ifdef PLUMPOWERDEBUG
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plumpower_dump(sc);
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#endif
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}
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#ifdef PLUMPOWERDEBUG
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#define ISPOWERSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_PWRCONT_##m, #m)
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#define ISCLOCKSUPPLY(r, m) dbg_bitmask_print(r, PLUM_POWER_CLKCONT_##m, #m)
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static void
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plumpower_dump(struct plumpower_softc *sc)
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{
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bus_space_tag_t regt = sc->sc_regt;
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bus_space_handle_t regh = sc->sc_regh;
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plumreg_t reg;
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reg = plum_conf_read(regt, regh, PLUM_POWER_PWRCONT_REG);
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printf(" power:");
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ISPOWERSUPPLY(reg, USBEN);
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ISPOWERSUPPLY(reg, IO5OE);
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ISPOWERSUPPLY(reg, LCDOE);
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ISPOWERSUPPLY(reg, EXTPW2);
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ISPOWERSUPPLY(reg, EXTPW1);
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ISPOWERSUPPLY(reg, EXTPW0);
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ISPOWERSUPPLY(reg, IO5PWR);
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ISPOWERSUPPLY(reg, BKLIGHT);
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ISPOWERSUPPLY(reg, LCDPWR);
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ISPOWERSUPPLY(reg, LCDDSP);
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reg = plum_conf_read(regt, regh, PLUM_POWER_CLKCONT_REG);
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printf("\n clock:");
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ISCLOCKSUPPLY(reg, USBCLK2);
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ISCLOCKSUPPLY(reg, USBCLK1);
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ISCLOCKSUPPLY(reg, IO5CLK);
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ISCLOCKSUPPLY(reg, SMCLK);
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ISCLOCKSUPPLY(reg, PCCCLK2);
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ISCLOCKSUPPLY(reg, PCCCLK1);
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reg = plum_conf_read(regt, regh, PLUM_POWER_INPENA_REG);
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printf("\n MCS interface %sebled",
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reg & PLUM_POWER_INPENA ? "en" : "dis");
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reg = plum_conf_read(regt, regh, PLUM_POWER_RESETC_REG);
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printf("\n IO5 reset:%s %s",
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reg & PLUM_POWER_RESETC_IO5CL0 ? "CLRL" : "",
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reg & PLUM_POWER_RESETC_IO5CL1 ? "CLRH" : "");
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printf("\n");
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}
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#endif /* PLUMPOWERDEBUG */
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