7bb66692c0
counter on 5k/240s to interpolate to microsecond-resolution clock in microtime(). Only the "rev B" ASIC in 5k/240s is known to have this counter; other models may or may not. This gives microsecond resolution at user-level, and up to 40ns resolution (modulo the nominal 5(?) 40MHz cpu cycles for reads to complete) in the kernel. Change the IOASIC reset function to set up the DMA mapping for the 53c94. Allocate 16 Kbytes of DMA buffer for 53c94 ASCs under an IOASIC, as the 3MAX baseboard and TC options have 128 Kbytes of static bounce buffer, and the drivers really _should_ support 16Kbyte I/O requests. (They don't always.) Give the LANCE a hard reset on 5k/240s, just to be on the safe side. (the 5k/240 I use sometimes reported errors at boot time.)