188 lines
3.7 KiB
C
188 lines
3.7 KiB
C
/* $NetBSD: tga_conf.c,v 1.5 1997/09/02 13:19:59 thorpej Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: tga_conf.c,v 1.5 1997/09/02 13:19:59 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <dev/pci/pcivar.h>
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#include <machine/tgareg.h>
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#include <alpha/pci/tgavar.h>
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#undef KB
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#define KB * 1024
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#undef MB
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#define MB * 1024 * 1024
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static const struct tga_conf tga_configs[TGA_TYPE_UNKNOWN] = {
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/* TGA_TYPE_T8_01 */
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{
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"T8-01",
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&tga_ramdac_bt485,
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8,
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4 MB,
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2 KB,
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1, { 2 MB, 0 }, { 1 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T8_02 */
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{
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"T8-02",
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&tga_ramdac_bt485,
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8,
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4 MB,
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4 KB,
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1, { 2 MB, 0 }, { 2 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T8_22 */
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{
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"T8-22",
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&tga_ramdac_bt485,
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8,
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8 MB,
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4 KB,
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1, { 4 MB, 0 }, { 2 MB, 0 },
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1, { 6 MB, 0 }, { 2 MB, 0 },
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},
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/* TGA_TYPE_T8_44 */
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{
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"T8-44",
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&tga_ramdac_bt485,
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8,
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16 MB,
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4 KB,
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2, { 8 MB, 12 MB }, { 2 MB, 2 MB },
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2, { 10 MB, 14 MB }, { 2 MB, 2 MB },
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},
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/* TGA_TYPE_T32_04 */
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{
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"T32-04",
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&tga_ramdac_bt463,
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32,
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16 MB,
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8 KB,
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1, { 8 MB, 0 }, { 4 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T32_08 */
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{
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"T32-08",
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&tga_ramdac_bt463,
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32,
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16 MB,
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16 KB,
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1, { 8 MB, 0 }, { 8 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T32_88 */
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{
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"T32-88",
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&tga_ramdac_bt463,
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32,
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32 MB,
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16 KB,
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1, { 16 MB, 0 }, { 8 MB, 0 },
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1, { 24 MB, 0 }, { 8 MB, 0 },
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},
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};
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#undef KB
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#undef MB
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int
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tga_identify(regs)
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tga_reg_t *regs;
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{
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int type;
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int deep, addrmask, wide;
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deep = (regs[TGA_REG_GDER] & 0x1) != 0; /* XXX */
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addrmask = ((regs[TGA_REG_GDER] >> 2) & 0x7); /* XXX */
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wide = (regs[TGA_REG_GDER] & 0x200) == 0; /* XXX */
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type = TGA_TYPE_UNKNOWN;
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if (!deep) {
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/* 8bpp frame buffer */
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if (addrmask == 0x0) {
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/* 4MB core map; T8-01 or T8-02 */
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if (!wide)
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type = TGA_TYPE_T8_01;
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else
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type = TGA_TYPE_T8_02;
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} else if (addrmask == 0x1) {
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/* 8MB core map; T8-22 */
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if (wide) /* sanity */
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type = TGA_TYPE_T8_22;
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} else if (addrmask == 0x3) {
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/* 16MB core map; T8-44 */
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if (wide) /* sanity */
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type = TGA_TYPE_T8_44;
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}
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} else {
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/* 32bpp frame buffer */
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if (addrmask == 0x3) {
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/* 16MB core map; T32-04 or T32-08 */
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if (!wide)
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type = TGA_TYPE_T32_04;
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else
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type = TGA_TYPE_T32_08;
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} else if (addrmask == 0x7) {
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/* 32MB core map; T32-88 */
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if (wide) /* sanity */
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type = TGA_TYPE_T32_88;
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}
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}
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return (type);
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}
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const struct tga_conf *
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tga_getconf(type)
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int type;
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{
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if (type >= 0 && type < TGA_TYPE_UNKNOWN)
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return &tga_configs[type];
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return (NULL);
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}
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