738 lines
20 KiB
C
738 lines
20 KiB
C
/* $NetBSD: if_ntwoc_pci.c,v 1.11 2003/01/20 05:30:07 simonb Exp $ */
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/*
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* Copyright (c) 1998 Vixie Enterprises
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of Vixie Enterprises nor the names
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* of its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
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* CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This software has been written for Vixie Enterprises by Michael Graff
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* <explorer@flame.org>. To learn more about Vixie Enterprises, see
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* ``http://www.vix.com''.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_ntwoc_pci.c,v 1.11 2003/01/20 05:30:07 simonb Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/ic/hd64570reg.h>
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#include <dev/ic/hd64570var.h>
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#include <dev/pci/if_ntwoc_pcireg.h>
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#if 0
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#define NTWO_DEBUG
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#endif
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#ifdef NTWO_DEBUG
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#define NTWO_DPRINTF(x) printf x
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#else
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#define NTWO_DPRINTF(x)
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#endif
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/*
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* buffers per tx and rx channels, per port, and the size of each.
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* Don't use these constants directly, as they are really only hints.
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* Use the calculated values stored in struct sca_softc instead.
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*
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* Each must be at least 2, receive would be better at around 20 or so.
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*
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* XXX Due to a damned near impossible to track down bug, transmit buffers
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* MUST be 2, no more, no less.
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*/
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#ifndef NTWOC_NtxBUFS
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#define NTWOC_NtxBUFS 40
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#endif
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#ifndef NTWOC_NrxBUFS
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#define NTWOC_NrxBUFS 20
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#endif
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#if __NetBSD_Version__ >= 104160000
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static void ntwoc_pci_config_interrupts __P((struct device *));
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#else
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#define SCA_BASECLOCK 16000000
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#endif
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/*
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* Card specific config register location
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*/
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#define PCI_CBMA_ASIC 0x10 /* Configuration Base Memory Address */
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#define PCI_CBMA_SCA 0x18
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struct ntwoc_pci_softc {
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/* Generic device stuff */
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struct device sc_dev; /* Common to all devices */
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/* PCI chipset glue */
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pci_intr_handle_t *sc_ih; /* Interrupt handler */
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pci_chipset_tag_t sc_sr; /* PCI chipset handle */
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bus_space_tag_t sc_asic_iot; /* space cookie (for ASIC) */
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bus_space_handle_t sc_asic_ioh; /* bus space handle (for ASIC) */
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struct sca_softc sc_sca; /* the SCA itself */
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};
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static int ntwoc_pci_match __P((struct device *, struct cfdata *, void *));
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static void ntwoc_pci_attach __P((struct device *, struct device *, void *));
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static int ntwoc_pci_alloc_dma __P((struct sca_softc *));
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static void ntwoc_pci_clock_callback __P((void *, int, int));
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static void ntwoc_pci_dtr_callback __P((void *, int, int));
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static void ntwoc_pci_get_clock __P((struct sca_port *, u_int8_t, u_int8_t,
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u_int8_t, u_int8_t));
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static int ntwoc_pci_intr __P((void *));
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static void ntwoc_pci_setup_dma __P((struct sca_softc *));
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static void ntwoc_pci_shutdown __P((void *sc));
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CFATTACH_DECL(ntwoc_pci, sizeof(struct ntwoc_pci_softc),
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ntwoc_pci_match, ntwoc_pci_attach, NULL, NULL);
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/*
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* Names for daughter card types. These match the NTWOC_DB_* defines.
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*/
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char *ntwoc_pci_db_names[] = {
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"V.35", "Unknown 0x01", "Test", "Unknown 0x03",
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"RS232", "Unknown 0x05", "RS422", "None"
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};
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/*
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* At least one implementation uses a somewhat strange register address
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* mapping. If a card doesn't, define this to be a pass-through
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* macro. (The ntwo driver needs this...)
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*/
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#define SCA_REG(y) (((y) & 0x0002) ? (((y) & 0x00fd) + 0x100) : (y))
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/*
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* functions that read and write to the sca registers
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*/
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static void
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ntwoc_pci_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val)
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{
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bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
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}
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static void
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ntwoc_pci_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val)
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{
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
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}
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static u_int8_t
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ntwoc_pci_sca_read_1(struct sca_softc *sc, u_int reg)
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{
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return
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bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
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}
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static u_int16_t
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ntwoc_pci_sca_read_2(struct sca_softc *sc, u_int reg)
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{
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return
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bus_space_read_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
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}
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static int
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ntwoc_pci_match(struct device *parent, struct cfdata *match, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RISCOM)
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&& (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RISCOM_N2))
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return 1;
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return 0;
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}
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static void
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ntwoc_pci_attach(struct device *parent, struct device *self, void *aux)
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{
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struct ntwoc_pci_softc *sc = (void *)self;
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struct pci_attach_args *pa = aux;
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struct sca_softc *sca = &sc->sc_sca;
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pci_intr_handle_t ih;
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const char *intrstr;
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pcireg_t csr;
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u_int8_t tmc, rdiv, tdiv;
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u_int16_t frontend_cr;
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u_int16_t db0, db1;
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u_int32_t flags;
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u_int numports;
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printf(": N2 Serial Interface\n");
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flags = sc->sc_dev.dv_cfdata->cf_flags;
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/*
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* Map in the ASIC configuration space
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*/
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if (pci_mapreg_map(pa, PCI_CBMA_ASIC, PCI_MAPREG_TYPE_MEM, 0,
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&sc->sc_asic_iot, &sc->sc_asic_ioh, NULL, NULL)) {
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printf("%s: Can't map register space (ASIC)\n",
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sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Map in the serial controller configuration space
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*/
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if (pci_mapreg_map(pa, PCI_CBMA_SCA, PCI_MAPREG_TYPE_MEM, 0,
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&sca->sc_iot, &sca->sc_ioh, NULL, NULL)) {
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printf("%s: Can't map register space (SCA)\n",
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sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Enable the card
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*/
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csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
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/*
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* Map and establish the interrupt
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*/
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if (pci_intr_map(pa, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pa->pa_pc, ih);
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sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, ntwoc_pci_intr,
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sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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/*
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* Perform total black magic. This is not only extremely
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* disgusting, but it should be explained a lot more in the
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* card's documentation.
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*
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* From what I gather, this does nothing more than configure the
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* PCI to ISA translator ASIC the N2pci card uses.
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*
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* From the FreeBSD driver:
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* offset
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* 0x00 - Map Range - Mem-mapped to locate anywhere
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* 0x04 - Re-Map - PCI address decode enable
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* 0x18 - Bus Region - 32-bit bus, ready enable
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* 0x1c - Master Range - include all 16 MB
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* 0x20 - Master RAM - Map SCA Base at 0
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* 0x28 - Master Remap - direct master memory enable
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* 0x68 - Interrupt - Enable interrupt (0 to disable)
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*/
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x00, 0xfffff000);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x04, 1);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x18, 0x40030043);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x1c, 0xff000000);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x20, 0);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x28, 0xe9);
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bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
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0x68, 0x10900);
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/*
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* pass the dma tag to the SCA
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*/
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sca->sc_usedma = 1;
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sca->scu_dmat = pa->pa_dmat;
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/*
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* Read the configuration information off the daughter card.
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*/
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frontend_cr = bus_space_read_2(sca->sc_iot, sca->sc_ioh, NTWOC_FECR);
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NTWO_DPRINTF(("%s: frontend_cr = 0x%04x\n",
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sc->sc_dev.dv_xname, frontend_cr));
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db0 = (frontend_cr & NTWOC_FECR_ID0) >> NTWOC_FECR_ID0_SHIFT;
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db1 = (frontend_cr & NTWOC_FECR_ID1) >> NTWOC_FECR_ID1_SHIFT;
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/*
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* Port 1 HAS to be present. If it isn't, don't attach anything.
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*/
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if (db0 == NTWOC_FE_ID_NONE) {
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printf("%s: no ports available\n", sc->sc_dev.dv_xname);
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return;
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}
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/*
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* Port 1 is present. Now, check to see if port 2 is also
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* present.
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*/
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numports = 1;
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if (db1 != NTWOC_FE_ID_NONE)
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numports++;
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printf("%s: %d port%s\n", sc->sc_dev.dv_xname, numports,
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(numports > 1 ? "s" : ""));
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printf("%s: port 0 interface card: %s\n", sc->sc_dev.dv_xname,
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ntwoc_pci_db_names[db0]);
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if (numports > 1)
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printf("%s: port 1 interface card: %s\n", sc->sc_dev.dv_xname,
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ntwoc_pci_db_names[db1]);
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/*
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* enable the RS422 tristate transmit
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* diable clock output (use receiver clock for both)
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*/
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frontend_cr |= (NTWOC_FECR_TE0 | NTWOC_FECR_TE1);
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frontend_cr &= ~(NTWOC_FECR_ETC0 | NTWOC_FECR_ETC1);
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bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
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NTWOC_FECR, frontend_cr);
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/*
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* initialize the SCA. This will allocate DMAable memory based
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* on the number of ports we passed in, the size of each
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* buffer, and the number of buffers per port.
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*/
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sca->sc_parent = &sc->sc_dev;
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sca->sc_read_1 = ntwoc_pci_sca_read_1;
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sca->sc_read_2 = ntwoc_pci_sca_read_2;
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sca->sc_write_1 = ntwoc_pci_sca_write_1;
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sca->sc_write_2 = ntwoc_pci_sca_write_2;
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sca->sc_dtr_callback = ntwoc_pci_dtr_callback;
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sca->sc_clock_callback = ntwoc_pci_clock_callback;
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sca->sc_aux = sc;
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sca->sc_numports = numports;
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/*
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* get clock information from user
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*/
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rdiv = (flags & NTWOC_FLAGS_RXDIV_MASK) >> NTWOC_FLAGS_RXDIV_SHIFT;
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if (rdiv > 9)
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panic("bad rx divisor in flags");
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tdiv = (flags & NTWOC_FLAGS_TXDIV_MASK) >> NTWOC_FLAGS_TXDIV_SHIFT;
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if (tdiv > 9)
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panic("bad tx divisor in flags");
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tmc = (flags & NTWOC_FLAGS_TMC_MASK) >> NTWOC_FLAGS_TMC_SHIFT;
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ntwoc_pci_get_clock(&sca->sc_ports[0], flags & NTWOC_FLAGS_CLK0_MASK,
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tmc, rdiv, tdiv);
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if (sca->sc_numports > 1)
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ntwoc_pci_get_clock(&sca->sc_ports[1],
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(flags & NTWOC_FLAGS_CLK1_MASK) >> NTWOC_FLAGS_CLK1_SHIFT,
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tmc, rdiv, tdiv);
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/* allocate dma'able memory for card to use */
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ntwoc_pci_alloc_dma(sca);
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ntwoc_pci_setup_dma(sca);
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sca_init(sca);
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/*
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* always initialize port 0, since we have to have found it to
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* get this far. If we have two ports, attach the second
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* as well.
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*/
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sca_port_attach(sca, 0);
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if (numports == 2)
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sca_port_attach(sca, 1);
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/*
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* Add shutdown hook so that DMA is disabled prior to reboot. Not
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* doing do could allow DMA to corrupt kernel memory during the
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* reboot before the driver initializes.
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*/
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shutdownhook_establish(ntwoc_pci_shutdown, sc);
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#if __NetBSD_Version__ >= 104160000
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/*
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* defer getting the base clock until interrupts are enabled
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* (and thus we have microtime())
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*/
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config_interrupts(self, ntwoc_pci_config_interrupts);
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#else
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sca->sc_baseclock = SCA_BASECLOCK;
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sca_print_clock_info(&sc->sc_sca);
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#endif
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}
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/*
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* extract the clock information for a port from the flags field
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*/
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static void
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ntwoc_pci_get_clock(struct sca_port *scp, u_int8_t flags, u_int8_t tmc,
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u_int8_t rdiv, u_int8_t tdiv)
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{
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scp->sp_eclock =
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(flags & NTWOC_FLAGS_ECLOCK_MASK) >> NTWOC_FLAGS_ECLOCK_SHIFT;
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scp->sp_rxs = rdiv;
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scp->sp_txs = tdiv;
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scp->sp_tmc = tmc;
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/* get rx source */
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switch ((flags & NTWOC_FLAGS_RXS_MASK) >> NTWOC_FLAGS_RXS_SHIFT) {
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case NTWOC_FLAGS_RXS_LINE:
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scp->sp_rxs = 0;
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break;
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case NTWOC_FLAGS_RXS_LINE_SN:
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scp->sp_rxs |= SCA_RXS_CLK_LINE_SN;
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break;
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case NTWOC_FLAGS_RXS_INTERNAL:
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scp->sp_rxs |= SCA_RXS_CLK_INTERNAL;
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break;
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case NTWOC_FLAGS_RXS_ADPLL_OUT:
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scp->sp_rxs |= SCA_RXS_CLK_ADPLL_OUT;
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break;
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case NTWOC_FLAGS_RXS_ADPLL_IN:
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scp->sp_rxs |= SCA_RXS_CLK_ADPLL_IN;
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break;
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default:
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panic("bad rx source in flags");
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}
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/* get tx source */
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switch ((flags & NTWOC_FLAGS_TXS_MASK) >> NTWOC_FLAGS_TXS_SHIFT) {
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case NTWOC_FLAGS_TXS_LINE:
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scp->sp_txs = 0;
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break;
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case NTWOC_FLAGS_TXS_INTERNAL:
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scp->sp_txs |= SCA_TXS_CLK_INTERNAL;
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break;
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case NTWOC_FLAGS_TXS_RXCLOCK:
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scp->sp_txs |= SCA_TXS_CLK_RXCLK;
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break;
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default:
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panic("bad rx source in flags");
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}
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}
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static int
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ntwoc_pci_intr(void *arg)
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{
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struct ntwoc_pci_softc *sc = (struct ntwoc_pci_softc *)arg;
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return sca_hardintr(&sc->sc_sca);
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}
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/*
|
|
* shut down interrupts and DMA, so we don't trash the kernel on warm
|
|
* boot. Also, lower DTR on each port and disable card interrupts.
|
|
*/
|
|
static void
|
|
ntwoc_pci_shutdown(void *aux)
|
|
{
|
|
struct ntwoc_pci_softc *sc = aux;
|
|
u_int16_t fecr;
|
|
|
|
/*
|
|
* shut down the SCA ports
|
|
*/
|
|
sca_shutdown(&sc->sc_sca);
|
|
|
|
/*
|
|
* disable interrupts for the whole card. Black magic, see comment
|
|
* above.
|
|
*/
|
|
bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
|
|
0x68, 0x10900);
|
|
|
|
/*
|
|
* lower DTR on both ports
|
|
*/
|
|
fecr = bus_space_read_2(sc->sc_sca.sc_iot,
|
|
sc->sc_sca.sc_ioh, NTWOC_FECR);
|
|
fecr |= (NTWOC_FECR_DTR0 | NTWOC_FECR_DTR1);
|
|
bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
|
|
NTWOC_FECR, fecr);
|
|
}
|
|
|
|
static void
|
|
ntwoc_pci_dtr_callback(void *aux, int port, int state)
|
|
{
|
|
struct ntwoc_pci_softc *sc = aux;
|
|
u_int16_t fecr;
|
|
|
|
fecr = bus_space_read_2(sc->sc_sca.sc_iot,
|
|
sc->sc_sca.sc_ioh, NTWOC_FECR);
|
|
|
|
NTWO_DPRINTF(("dtr: port == %d, state == %d, old fecr: 0x%04x\n",
|
|
port, state, fecr));
|
|
|
|
if (port == 0) {
|
|
if (state == 0)
|
|
fecr |= NTWOC_FECR_DTR0;
|
|
else
|
|
fecr &= ~NTWOC_FECR_DTR0;
|
|
} else {
|
|
if (state == 0)
|
|
fecr |= NTWOC_FECR_DTR1;
|
|
else
|
|
fecr &= ~NTWOC_FECR_DTR1;
|
|
}
|
|
|
|
NTWO_DPRINTF(("new fecr: 0x%04x\n", fecr));
|
|
|
|
bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
|
|
NTWOC_FECR, fecr);
|
|
}
|
|
|
|
static void
|
|
ntwoc_pci_clock_callback(void *aux, int port, int enable)
|
|
{
|
|
struct ntwoc_pci_softc *sc = aux;
|
|
u_int16_t fecr;
|
|
|
|
fecr = bus_space_read_2(sc->sc_sca.sc_iot,
|
|
sc->sc_sca.sc_ioh, NTWOC_FECR);
|
|
|
|
NTWO_DPRINTF(("clk: port == %d, enable == %d, old fecr: 0x%04x\n",
|
|
port, enable, fecr));
|
|
|
|
if (port == 0) {
|
|
if (enable)
|
|
fecr |= NTWOC_FECR_ETC0;
|
|
else
|
|
fecr &= ~NTWOC_FECR_ETC0;
|
|
} else {
|
|
if (enable)
|
|
fecr |= NTWOC_FECR_ETC1;
|
|
else
|
|
fecr &= ~NTWOC_FECR_ETC1;
|
|
}
|
|
|
|
NTWO_DPRINTF(("new fecr: 0x%04x\n", fecr));
|
|
|
|
bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
|
|
NTWOC_FECR, fecr);
|
|
}
|
|
|
|
static int
|
|
ntwoc_pci_alloc_dma(struct sca_softc *sc)
|
|
{
|
|
u_int allocsize;
|
|
int err;
|
|
int rsegs;
|
|
u_int bpp;
|
|
|
|
/* first initialize the number of descriptors */
|
|
sc->sc_ports[0].sp_nrxdesc = NTWOC_NrxBUFS;
|
|
sc->sc_ports[0].sp_ntxdesc = NTWOC_NtxBUFS;
|
|
if (sc->sc_numports == 2) {
|
|
sc->sc_ports[1].sp_nrxdesc = NTWOC_NrxBUFS;
|
|
sc->sc_ports[1].sp_ntxdesc = NTWOC_NtxBUFS;
|
|
}
|
|
|
|
NTWO_DPRINTF(("sizeof sca_desc_t: %d bytes\n", sizeof (sca_desc_t)));
|
|
|
|
bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS);
|
|
|
|
allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t));
|
|
|
|
/*
|
|
* sanity checks:
|
|
*
|
|
* Check the total size of the data buffers, and so on. The total
|
|
* DMAable space needs to fit within a single 16M region, and the
|
|
* descriptors need to fit within a 64K region.
|
|
*/
|
|
if (allocsize > 16 * 1024 * 1024)
|
|
return 1;
|
|
if (bpp * sizeof (sca_desc_t) > 64 * 1024)
|
|
return 1;
|
|
|
|
sc->scu_allocsize = allocsize;
|
|
|
|
/*
|
|
* Allocate one huge chunk of memory.
|
|
*/
|
|
if (bus_dmamem_alloc(sc->scu_dmat,
|
|
allocsize,
|
|
SCA_DMA_ALIGNMENT,
|
|
SCA_DMA_BOUNDRY,
|
|
&sc->scu_seg, 1, &rsegs, BUS_DMA_NOWAIT) != 0) {
|
|
printf("Could not allocate DMA memory\n");
|
|
return 1;
|
|
}
|
|
NTWO_DPRINTF(("DMA memory allocated: %d bytes\n", allocsize));
|
|
|
|
if (bus_dmamem_map(sc->scu_dmat, &sc->scu_seg, 1, allocsize,
|
|
&sc->scu_dma_addr, BUS_DMA_NOWAIT) != 0) {
|
|
printf("Could not map DMA memory into kernel space\n");
|
|
return 1;
|
|
}
|
|
NTWO_DPRINTF(("DMA memory mapped\n"));
|
|
|
|
if (bus_dmamap_create(sc->scu_dmat, allocsize, 2,
|
|
allocsize, SCA_DMA_BOUNDRY,
|
|
BUS_DMA_NOWAIT, &sc->scu_dmam) != 0) {
|
|
printf("Could not create DMA map\n");
|
|
return 1;
|
|
}
|
|
NTWO_DPRINTF(("DMA map created\n"));
|
|
|
|
err = bus_dmamap_load(sc->scu_dmat, sc->scu_dmam, sc->scu_dma_addr,
|
|
allocsize, NULL, BUS_DMA_NOWAIT);
|
|
if (err != 0) {
|
|
printf("Could not load DMA segment: %d\n", err);
|
|
return 1;
|
|
}
|
|
NTWO_DPRINTF(("DMA map loaded\n"));
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Take the memory allocated with sca_alloc_dma() and divide it among the
|
|
* two ports.
|
|
*/
|
|
static void
|
|
ntwoc_pci_setup_dma(struct sca_softc *sc)
|
|
{
|
|
sca_port_t *scp0, *scp1;
|
|
u_int8_t *vaddr0;
|
|
u_int32_t paddr0;
|
|
u_long addroff;
|
|
|
|
/*
|
|
* remember the physical address to 24 bits only, since the upper
|
|
* 8 bits is programed into the device at a different layer.
|
|
*/
|
|
paddr0 = (sc->scu_dmam->dm_segs[0].ds_addr & 0x00ffffff);
|
|
vaddr0 = sc->scu_dma_addr;
|
|
|
|
/*
|
|
* if we have only one port it gets the full range. If we have
|
|
* two we need to do a little magic to divide things up.
|
|
*
|
|
* The descriptors will all end up in the front of the area, while
|
|
* the remainder of the buffer is used for transmit and receive
|
|
* data.
|
|
*
|
|
* -------------------- start of memory
|
|
* tx desc port 0
|
|
* rx desc port 0
|
|
* tx desc port 1
|
|
* rx desc port 1
|
|
* tx buffer port 0
|
|
* rx buffer port 0
|
|
* tx buffer port 1
|
|
* rx buffer port 1
|
|
* -------------------- end of memory
|
|
*/
|
|
scp0 = &sc->sc_ports[0];
|
|
scp1 = &sc->sc_ports[1];
|
|
|
|
scp0->sp_txdesc_p = paddr0;
|
|
scp0->sp_txdesc = (sca_desc_t *)vaddr0;
|
|
addroff = sizeof(sca_desc_t) * scp0->sp_ntxdesc;
|
|
|
|
/*
|
|
* point to the range following the tx descriptors, and
|
|
* set the rx descriptors there.
|
|
*/
|
|
scp0->sp_rxdesc_p = paddr0 + addroff;
|
|
scp0->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
|
|
addroff += sizeof(sca_desc_t) * scp0->sp_nrxdesc;
|
|
|
|
if (sc->sc_numports == 2) {
|
|
scp1->sp_txdesc_p = paddr0 + addroff;
|
|
scp1->sp_txdesc = (sca_desc_t *)(vaddr0 + addroff);
|
|
addroff += sizeof(sca_desc_t) * scp1->sp_ntxdesc;
|
|
|
|
scp1->sp_rxdesc_p = paddr0 + addroff;
|
|
scp1->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
|
|
addroff += sizeof(sca_desc_t) * scp1->sp_nrxdesc;
|
|
}
|
|
|
|
/*
|
|
* point to the memory following the descriptors, and set the
|
|
* transmit buffer there.
|
|
*/
|
|
scp0->sp_txbuf_p = paddr0 + addroff;
|
|
scp0->sp_txbuf = vaddr0 + addroff;
|
|
addroff += SCA_BSIZE * scp0->sp_ntxdesc;
|
|
|
|
/*
|
|
* lastly, skip over the transmit buffer and set up pointers into
|
|
* the receive buffer.
|
|
*/
|
|
scp0->sp_rxbuf_p = paddr0 + addroff;
|
|
scp0->sp_rxbuf = vaddr0 + addroff;
|
|
addroff += SCA_BSIZE * scp0->sp_nrxdesc;
|
|
|
|
if (sc->sc_numports == 2) {
|
|
scp1->sp_txbuf_p = paddr0 + addroff;
|
|
scp1->sp_txbuf = vaddr0 + addroff;
|
|
addroff += SCA_BSIZE * scp1->sp_ntxdesc;
|
|
|
|
scp1->sp_rxbuf_p = paddr0 + addroff;
|
|
scp1->sp_rxbuf = vaddr0 + addroff;
|
|
addroff += SCA_BSIZE * scp1->sp_nrxdesc;
|
|
}
|
|
|
|
/*
|
|
* as a consistancy check, addroff should be equal to the allocation
|
|
* size.
|
|
*/
|
|
if (sc->scu_allocsize != addroff)
|
|
printf("ERROR: scu_allocsize != addroff: %lu != %lu\n",
|
|
(u_long)sc->scu_allocsize, addroff);
|
|
}
|
|
|
|
#if __NetBSD_Version__ >= 104160000
|
|
static void
|
|
ntwoc_pci_config_interrupts(self)
|
|
struct device *self;
|
|
{
|
|
struct ntwoc_pci_softc *sc;
|
|
|
|
sc = (void *)self;
|
|
sca_get_base_clock(&sc->sc_sca);
|
|
sca_print_clock_info(&sc->sc_sca);
|
|
}
|
|
#endif
|