a8d2e55834
on R5000/Rm52xx machines: - Add a new global variable mips_cache_virtual_alias in mips/cache.c, which indicates that VIPT cache on the CPU could cause virtual alias and software support is required to handle it. (i.e. no VCED/VCEI) - Add several cache flush/invalidate ops around KSEG0 access which might cause virtual alias if mips_cache_virtual_alias is true. (note checking mips_sdcache_line_size isn't valid for R5000/Rm52xx because only R4000/R4400 with L2 cache have VCED/VCEI) - Remove a global variable mips_sdcache_forceinv, which is now superseded by new mips_cache_virtual_alias. While here, also change some R4000/R4400 cache ops: - Don't override mips_cache_alias_mask and mips_cache_prefer_mask with values based on MIPS3_MAX_PCACHE_SIZE for R4000/R4400 with L2 cache because it's still worth to reduce VCED/VCEI. - Flush dcache in pmap_zero_page(9) unconditionally on all MIPS_HAS_R4K_MMU CPUs and remove cache flush code from cpu_lwp_fork() in vm_machdep.c. Thanks to Markus W Kilbinger for testing patches on port-cobalt/port-mips. XXX This fix is just a workaround because it doesn't handle all possible XXX virtual aliases. As discussed on port-mips, maybe the real fix XXX for virtual alias is to change MI UVM to adapt it to VIPT cache. XXX (all VA mappings against the same PA must have the same VAC index etc.)
200 lines
7.2 KiB
C
200 lines
7.2 KiB
C
/* $NetBSD: pmap.h,v 1.47 2005/03/26 09:51:02 tsutsui Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _MIPS_PMAP_H_
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#define _MIPS_PMAP_H_
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#include <mips/cpuregs.h> /* for KSEG0 below */
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/*
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* The user address space is 2Gb (0x0 - 0x80000000).
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* User programs are laid out in memory as follows:
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* address
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* USRTEXT 0x00001000
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* USRDATA USRTEXT + text_size
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* USRSTACK 0x7FFFFFFF
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*
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* The user address space is mapped using a two level structure where
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* virtual address bits 30..22 are used to index into a segment table which
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* points to a page worth of PTEs (4096 page can hold 1024 PTEs).
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* Bits 21..12 are then used to index a PTE which describes a page within
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* a segment.
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*
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* The wired entries in the TLB will contain the following:
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* 0-1 (UPAGES) for curproc user struct and kernel stack.
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*
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* Note: The kernel doesn't use the same data structures as user programs.
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* All the PTE entries are stored in a single array in Sysmap which is
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* dynamically allocated at boot time.
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*/
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#define mips_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET)
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#define mips_round_seg(x) (((vaddr_t)(x) + SEGOFSET) & ~SEGOFSET)
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#define pmap_segmap(m, v) ((m)->pm_segtab->seg_tab[((v) >> SEGSHIFT)])
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#define PMAP_SEGTABSIZE 512
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union pt_entry;
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struct segtab {
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union pt_entry *seg_tab[PMAP_SEGTABSIZE];
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};
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/*
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* Machine dependent pmap structure.
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*/
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typedef struct pmap {
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int pm_count; /* pmap reference count */
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struct simplelock pm_lock; /* lock on pmap */
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struct pmap_statistics pm_stats; /* pmap statistics */
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unsigned pm_asid; /* TLB address space tag */
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unsigned pm_asidgen; /* its generation number */
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struct segtab *pm_segtab; /* pointers to pages of PTEs */
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} *pmap_t;
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/*
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* For each struct vm_page, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry_t, the list is pv_table.
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* XXX really should do this as a part of the higher level code.
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*/
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typedef struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vaddr_t pv_va; /* virtual address for mapping */
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int pv_flags; /* some flags for the mapping */
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} *pv_entry_t;
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#define PV_UNCACHED 0x0001 /* page is mapped uncached */
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#define PV_MODIFIED 0x0002 /* page has been modified */
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#define PV_REFERENCED 0x0004 /* page has been recently referenced */
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#ifdef _KERNEL
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extern char *pmap_attributes; /* reference and modify bits */
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extern struct pmap kernel_pmap_store;
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#define pmap_kernel() (&kernel_pmap_store)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_update(pmap) /* nothing (yet) */
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static __inline void
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pmap_remove_all(struct pmap *pmap)
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{
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/* Nothing. */
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}
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/*
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* Bootstrap the system enough to run with virtual memory.
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*/
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void pmap_bootstrap(void);
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void pmap_set_modified(paddr_t);
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void pmap_procwr(struct proc *, vaddr_t, size_t);
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#define PMAP_NEED_PROCWR
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/*
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* pmap_prefer() helps reduce virtual-coherency exceptions in
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* the virtually-indexed cache on mips3 CPUs.
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*/
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#ifdef MIPS3_PLUS
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#define PMAP_PREFER(pa, va, sz, td) pmap_prefer((pa), (va), (td))
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void pmap_prefer(vaddr_t, vaddr_t *, int);
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#endif /* MIPS3_PLUS */
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#define PMAP_STEAL_MEMORY /* enable pmap_steal_memory() */
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/*
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* Alternate mapping hooks for pool pages. Avoids thrashing the TLB.
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*/
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vaddr_t mips_pmap_map_poolpage(paddr_t);
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paddr_t mips_pmap_unmap_poolpage(vaddr_t);
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#define PMAP_MAP_POOLPAGE(pa) mips_pmap_map_poolpage(pa)
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#define PMAP_UNMAP_POOLPAGE(va) mips_pmap_unmap_poolpage(va)
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/*
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* Other hooks for the pool allocator.
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*/
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#define POOL_VTOPHYS(va) MIPS_KSEG0_TO_PHYS((vaddr_t)(va))
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/*
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* Select CCA to use for unmanaged pages.
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*/
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#define PMAP_CCA_FOR_PA(pa) 2 /* uncached */
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#endif /* _KERNEL */
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#endif /* _MIPS_PMAP_H_ */
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