2652188cc4
interface controllers (of varying intelligence levels). Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford, with some modification by me.
82 lines
3.1 KiB
C
82 lines
3.1 KiB
C
/* $NetBSD: ds1307reg.h,v 1.1 2003/09/30 00:35:31 thorpej Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_I2C_DS1307REG_H_
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#define _DEV_I2C_DS1307REG_H_
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/*
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* DS1307 64x8 Serial Real-Time Clock
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*/
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#define DS1307_ADDR 0x68 /* Fixed I2C Slave Address */
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#define DS1307_SECONDS 0x00
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#define DS1307_MINUTES 0x01
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#define DS1307_HOURS 0x02
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#define DS1307_DAY 0x03
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#define DS1307_DATE 0x04
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#define DS1307_MONTH 0x05
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#define DS1307_YEAR 0x06
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#define DS1307_CONTROL 0x07
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#define DS1307_NVRAM_START 0x08
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#define DS1307_NVRAM_END 0x3f
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#define DS1307_NRTC_REGS 8
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#define DS1307_NVRAM_SIZE ((DS1307_NVRAM_END - DS1307_NVRAM_START) + 1)
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/*
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* Bit definitions.
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*/
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#define DS1307_SECONDS_CH (1u << 7) /* Clock Hold */
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#define DS1307_SECONDS_MASK 0x7f
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#define DS1307_MINUTES_MASK 0x7f
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#define DS1307_HOURS_24HRS (1u << 6) /* Set for 24 hour mode */
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#define DS1307_HOURS_12HRS_PM (1u << 5) /* If 12 hr mode, set = PM */
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#define DS1307_HOURS_12MASK 0x1f
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#define DS1307_HOURS_24MASK 0x3f
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#define DS1307_DAY_MASK 0x07
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#define DS1307_DATE_MASK 0x3f
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#define DS1307_MONTH_MASK 0x1f
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#define DS1307_CONTROL_OUT (1u << 7) /* OSC/OUT pin value */
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#define DS1307_CONTROL_SQWE (1u << 4) /* Enable square wave output */
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#define DS1307_CONTROL_1HZ 0
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#define DS1307_CONTROL_4096HZ 1
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#define DS1307_CONTROL_8192HZ 2
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#define DS1307_CONTROL_32768HZ 3
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#endif /* _DEV_I2C_DS1307REG_H_ */
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