404 lines
7.3 KiB
C
404 lines
7.3 KiB
C
/* $NetBSD: iic.c,v 1.2 1996/04/26 22:01:56 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* iic.c
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*
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* Routines to communicate with IIC devices
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*
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* Created : 13/10/94
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*
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* Based of kate/display/iiccontrol.c
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <machine/io.h>
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#include <machine/iomd.h>
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#include <machine/katelib.h>
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#include <machine/cpu.h>
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#include <machine/irqhandler.h>
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#include <machine/iic.h>
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#include <arm32/mainbus/mainbus.h>
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/* Local function prototypes */
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static int iic_getack __P((void));
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static void iic_write_bit __P((int bit));
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static int iic_write_byte __P((u_char value));
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static u_char iic_read_byte __P((void));
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static void iic_start_bit __P((void));
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static void iic_stop_bit __P((void));
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struct iic_softc {
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struct device sc_dev;
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int sc_flags;
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#define IIC_BROKEN 1
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#define IIC_OPEN 2
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#define IIC_BUSY 4
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};
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void iicattach __P((struct device *parent, struct device *self, void *aux));
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int iicmatch __P((struct device *parent, void *match, void *aux));
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/*
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* Main entry to IIC driver.
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*/
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int
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iic_control(address, buffer, count)
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u_char address;
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u_char *buffer;
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int count;
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{
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int loop;
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/* Send the start bit */
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iic_start_bit();
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/* Send the address */
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if (!iic_write_byte(address)) {
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iic_stop_bit();
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return(-1);
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}
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/* Read or write the data as required */
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if ((address & 1) == 0) {
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/* Write bytes */
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for (loop = 0; loop < count; ++loop) {
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if (!iic_write_byte(buffer[loop])) {
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iic_stop_bit();
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return(-1);
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}
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}
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}
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else {
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/* Read bytes */
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for (loop = 0; loop < count; ++loop) {
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buffer[loop] = iic_read_byte();
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/* Send final acknowledge */
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if (loop == (count - 1))
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iic_write_bit(1);
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else
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iic_write_bit(0);
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}
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}
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/* Send stop bit */
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iic_stop_bit();
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return(0);
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}
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static int
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iic_getack()
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{
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u_int oldirqstate;
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int ack;
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iic_set_state(1, 0);
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oldirqstate = disable_interrupts(I32_bit);
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iic_set_state_and_ack(1, 1);
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ack = ReadByte(IOMD_IOCR);
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iic_set_state(1, 0);
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restore_interrupts(oldirqstate);
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return((ack & 1) == 0);
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}
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static void
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iic_write_bit(bit)
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int bit;
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{
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u_int oldirqstate;
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iic_set_state(bit, 0);
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oldirqstate = disable_interrupts(I32_bit);
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iic_set_state_and_ack(bit, 1);
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iic_set_state(bit, 0);
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restore_interrupts(oldirqstate);
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}
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static int
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iic_write_byte(value)
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u_char value;
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{
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int loop;
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int bit;
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for (loop = 0x80; loop != 0; loop = loop >> 1) {
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bit = ((value & loop) != 0);
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iic_write_bit(bit);
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}
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return(iic_getack());
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}
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static u_char
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iic_read_byte()
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{
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int loop;
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u_char byte;
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u_int oldirqstate;
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iic_set_state(1,0);
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byte = 0;
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for (loop = 0; loop < 8; ++loop) {
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oldirqstate = disable_interrupts(I32_bit);
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iic_set_state_and_ack(1, 1);
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byte = (byte << 1) + (ReadByte(IOMD_IOCR) & 1);
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iic_set_state(1, 0);
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restore_interrupts(oldirqstate);
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}
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return(byte);
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}
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static void
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iic_start_bit()
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{
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iic_set_state(1, 1);
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iic_set_state(0, 1);
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iic_delay(10);
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iic_set_state(0, 0);
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}
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static void
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iic_stop_bit()
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{
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iic_set_state(0, 1);
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iic_set_state(1, 1);
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}
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struct cfattach iic_ca = {
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sizeof(struct iic_softc), iicmatch, iicattach
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};
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struct cfdriver iic_cd = {
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NULL, "iic", DV_DULL, 0
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};
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int
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iicmatch(parent, match, aux)
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struct device *parent;
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void *match;
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void *aux;
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{
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int id;
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/* Make sure we have an IOMD we understand */
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id = ReadByte(IOMD_ID0) | (ReadByte(IOMD_ID1) << 8);
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/* So far I only know about this IOMD */
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switch (id) {
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case RPC600_IOMD_ID:
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case RC7500_IOC_ID:
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return(1);
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break;
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default:
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printf("iic: Unknown IOMD id=%04x", id);
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break;
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}
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return(0);
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}
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int
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iicprint(aux, name)
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void *aux;
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char *name;
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{
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struct iicbus_attach_args *ib = aux;
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if (!name) {
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if (ib->ib_addr)
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printf(" addr 0x%02x", ib->ib_addr);
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}
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/* XXXX print flags */
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return (QUIET);
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}
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int
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iicsubmatch(parent, match, aux)
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struct device *parent;
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void *match;
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void *aux;
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{
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struct cfdata *cf = match;
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struct iicbus_attach_args *ib = aux;
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if (cf->cf_fstate == FSTATE_STAR)
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panic("eekkk, I'm stuffed");
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ib->ib_addr = cf->cf_loc[0];
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if (ib->ib_addr == -1)
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return(0);
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return((*cf->cf_attach->ca_match)(parent, match, aux));
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}
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void
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iicattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct iicbus_attach_args iaa;
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printf("\n");
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while (config_found_sm(self, &iaa, iicprint, iicsubmatch));
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}
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int
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iicopen(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct iic_softc *sc;
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int unit = minor(dev);
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if (unit >= iic_cd.cd_ndevs)
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return(ENXIO);
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sc = iic_cd.cd_devs[unit];
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if (!sc) return(ENXIO);
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if (sc->sc_flags & IIC_OPEN) return(EBUSY);
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sc->sc_flags |= IIC_OPEN;
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return(0);
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}
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int
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iicclose(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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int unit = minor(dev);
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struct iic_softc *sc = iic_cd.cd_devs[unit];
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sc->sc_flags &= ~IIC_OPEN;
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return(0);
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}
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int
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iicread(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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/* int unit = minor(dev);*/
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/* struct iic_softc *sc = iic_cd.cd_devs[unit];*/
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return(ENXIO);
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}
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int
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iicwrite(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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/* int unit = minor(dev);*/
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/* struct iic_softc *sc = iic_cd.cd_devs[unit];*/
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return(ENXIO);
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}
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int
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iicioctl(dev, cmd, data, flag, p)
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dev_t dev;
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int cmd;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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/* struct iic_softc *sc = iic_cd.cd_devs[minor(dev)];*/
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/*
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switch (cmd) {
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case IICIOC_CONTROL:
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if (iiccontrol() != 0) {
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return(EIO);
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}
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return(0);
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}
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*/
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return(EINVAL);
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}
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/* End of iic.c */
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