494 lines
12 KiB
C
494 lines
12 KiB
C
/* $NetBSD: if_athn_usb.h,v 1.2 2013/03/30 14:14:31 christos Exp $ */
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/* $OpenBSD: if_athn_usb.h,v 1.3 2012/11/10 14:35:06 mikeb Exp $ */
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/*-
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* Copyright (c) 2011 Damien Bergamini <damien.bergamini@free.fr>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _IF_ATHN_USB_H_
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#define _IF_ATHN_USB_H_
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/* Maximum number of STAs firmware can handle. */
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#define AR_USB_MAX_STA 8
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#define AR_USB_DEFAULT_NF (-95)
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/* USB requests. */
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#define AR_FW_DOWNLOAD 0x30
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#define AR_FW_DOWNLOAD_COMP 0x31
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/* USB endpoints addresses. */
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#define AR_PIPE_TX_DATA (UE_DIR_OUT | 1)
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#define AR_PIPE_RX_DATA (UE_DIR_IN | 2)
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#define AR_PIPE_RX_INTR (UE_DIR_IN | 3)
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#define AR_PIPE_TX_INTR (UE_DIR_OUT | 4)
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/* Wireless module interface commands. */
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#define AR_WMI_CMD_ECHO 0x001
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#define AR_WMI_CMD_ACCESS_MEMORY 0x002
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#define AR_WMI_CMD_DISABLE_INTR 0x003
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#define AR_WMI_CMD_ENABLE_INTR 0x004
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#define AR_WMI_CMD_RX_LINK 0x005
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#define AR_WMI_CMD_ATH_INIT 0x006
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#define AR_WMI_CMD_ABORT_TXQ 0x007
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#define AR_WMI_CMD_STOP_TX_DMA 0x008
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#define AR_WMI_CMD_STOP_DMA_RECV 0x009
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#define AR_WMI_CMD_ABORT_TX_DMA 0x00a
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#define AR_WMI_CMD_DRAIN_TXQ 0x00b
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#define AR_WMI_CMD_DRAIN_TXQ_ALL 0x00c
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#define AR_WMI_CMD_START_RECV 0x00d
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#define AR_WMI_CMD_STOP_RECV 0x00e
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#define AR_WMI_CMD_FLUSH_RECV 0x00f
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#define AR_WMI_CMD_SET_MODE 0x010
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#define AR_WMI_CMD_RESET 0x011
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#define AR_WMI_CMD_NODE_CREATE 0x012
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#define AR_WMI_CMD_NODE_REMOVE 0x013
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#define AR_WMI_CMD_VAP_REMOVE 0x014
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#define AR_WMI_CMD_VAP_CREATE 0x015
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#define AR_WMI_CMD_BEACON_UPDATE 0x016
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#define AR_WMI_CMD_REG_READ 0x017
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#define AR_WMI_CMD_REG_WRITE 0x018
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#define AR_WMI_CMD_RC_STATE_CHANGE 0x019
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#define AR_WMI_CMD_RC_RATE_UPDATE 0x01a
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#define AR_WMI_CMD_DEBUG_INFO 0x01b
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#define AR_WMI_CMD_HOST_ATTACH 0x01c
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#define AR_WMI_CMD_TARGET_IC_UPDATE 0x01d
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#define AR_WMI_CMD_TGT_STATS 0x01e
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#define AR_WMI_CMD_TX_AGGR_ENABLE 0x01f
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#define AR_WMI_CMD_TGT_DETACH 0x020
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#define AR_WMI_CMD_TGT_TXQ_ENABLE 0x021
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#define AR_WMI_CMD_AGGR_LIMIT 0x026
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/* Wireless module interface events. */
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/*
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* XXX: the 3.7.4 Linux kernel differs with this. This matches the
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* 2.6.36 kernel.
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*/
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#if 1 /* Linux 2.6.26 */
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#define AR_WMI_EVT_TGT_RDY 0x001
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#define AR_WMI_EVT_SWBA 0x002
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#define AR_WMI_EVT_FATAL 0x003
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#define AR_WMI_EVT_TXTO 0x004
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#define AR_WMI_EVT_BMISS 0x005
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#define AR_WMI_EVT_WLAN_TXCOMP 0x006
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#define AR_WMI_EVT_DELBA 0x007
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#define AR_WMI_EVT_TXRATE 0x008
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#else /* Linux 3.7.4 */
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#define AR_WMI_EVT_TGT_RDY 0x001
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#define AR_WMI_EVT_SWBA 0x002
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#define AR_WMI_EVT_FATAL 0x003
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#define AR_WMI_EVT_TXTO 0x004
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#define AR_WMI_EVT_BMISS 0x005
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#define AR_WMI_EVT_DELBA 0x006
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#define AR_WMI_EVT_TXSTATUS 0x007
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#endif
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/* Structure for service AR_SVC_WMI_CONTROL. */
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struct ar_wmi_cmd_hdr {
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uint16_t cmd_id;
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#define AR_WMI_EVT_FLAG 0x1000
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uint16_t seq_no;
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} __packed;
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/* Values for AR_WMI_CMD_SET_MODE. */
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#define AR_HTC_MODE_AUTO 0
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#define AR_HTC_MODE_11A 1
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#define AR_HTC_MODE_11B 2
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#define AR_HTC_MODE_11G 3
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#define AR_HTC_MODE_FH 4
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#define AR_HTC_MODE_TURBO_A 5
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#define AR_HTC_MODE_TURBO_G 6
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#define AR_HTC_MODE_11NA 7
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#define AR_HTC_MODE_11NG 8
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#define AR_MAX_WRITE_COUNT 32
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/* Structure for command AR_WMI_CMD_REG_WRITE. */
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struct ar_wmi_cmd_reg_write {
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uint32_t addr;
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uint32_t val;
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} __packed;
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/* Structure for command AR_WMI_CMD_NODE_{CREATE,REMOVE}. */
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struct ar_htc_target_sta {
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uint16_t associd;
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uint16_t txpower;
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uint32_t pariwisekey;
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uint8_t macaddr[IEEE80211_ADDR_LEN];
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uint8_t bssid[IEEE80211_ADDR_LEN];
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uint8_t sta_index;
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uint8_t vif_index;
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uint8_t vif_sta;
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uint16_t flags;
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#define AR_HTC_STA_AUTH 0x0001
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#define AR_HTC_STA_QOS 0x0002
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#define AR_HTC_STA_ERP 0x0004
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#define AR_HTC_STA_HT 0x0008
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uint16_t htcap;
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uint8_t valid;
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uint16_t capinfo;
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uint32_t reserved[2];
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uint16_t txseqmgmt;
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uint8_t is_vif_sta;
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uint16_t maxampdu;
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uint16_t iv16;
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uint32_t iv32;
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} __packed;
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/* Structures for command AR_WMI_CMD_RC_RATE_UPDATE. */
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#define AR_HTC_RATE_MAX 30
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struct ar_htc_rateset {
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uint8_t rs_nrates;
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uint8_t rs_rates[AR_HTC_RATE_MAX];
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} __packed;
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struct ar_htc_target_rate {
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uint8_t sta_index;
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uint8_t isnew;
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uint32_t capflags;
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#define AR_RC_DS_FLAG 0x00000001
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#define AR_RC_TS_FLAG 0x00000002
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#define AR_RC_40_FLAG 0x00000004
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#define AR_RC_SGI_FLAG 0x00000008
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#define AR_RC_HT_FLAG 0x00000010
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struct ar_htc_rateset lg_rates;
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struct ar_htc_rateset ht_rates;
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} __packed;
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/* Structure for command AR_WMI_CMD_TX_AGGR_ENABLE. */
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struct ar_htc_target_aggr {
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uint8_t sta_index;
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uint8_t tidno;
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uint8_t aggr_enable;
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uint8_t padding;
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} __packed;
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/* Structure for command AR_WMI_CMD_VAP_CREATE. */
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struct ar_htc_target_vif {
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uint8_t index;
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uint8_t des_bssid[IEEE80211_ADDR_LEN];
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uint32_t opmode;
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#define AR_HTC_M_IBSS 0
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#define AR_HTC_M_STA 1
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#define AR_HTC_M_WDS 2
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#define AR_HTC_M_AHDEMO 3
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#define AR_HTC_M_HOSTAP 6
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#define AR_HTC_M_MONITOR 8
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uint8_t myaddr[IEEE80211_ADDR_LEN];
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uint8_t bssid[IEEE80211_ADDR_LEN];
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uint32_t flags;
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uint32_t flags_ext;
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uint16_t ps_sta;
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uint16_t rtsthreshold;
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uint8_t ath_cap;
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int8_t mcast_rate;
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} __packed;
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/* Structure for command AM_WMI_CMD_TARGET_IC_UPDATE. */
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struct ar_htc_cap_target {
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uint32_t flags;
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uint32_t flags_ext;
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uint32_t ampdu_limit;
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uint8_t ampdu_subframes;
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uint8_t ht_txchainmask;
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uint8_t lg_txchainmask;
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uint8_t rtscts_ratecode;
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uint8_t protmode;
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} __packed;
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/* Structure for event AR_WMI_EVT_TXRATE. */
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struct ar_wmi_evt_txrate {
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uint32_t txrate;
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uint8_t rssi_thresh;
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uint8_t per;
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} __packed;
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/* HTC header. */
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struct ar_htc_frame_hdr {
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uint8_t endpoint_id;
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uint8_t flags;
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#define AR_HTC_FLAG_TRAILER 0x02
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uint16_t payload_len;
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uint8_t control[4];
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} __packed;
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/* Structure for HTC enpoint id 0. */
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struct ar_htc_msg_hdr {
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uint16_t msg_id;
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#define AR_HTC_MSG_READY 0x0001
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#define AR_HTC_MSG_CONN_SVC 0x0002
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#define AR_HTC_MSG_CONN_SVC_RSP 0x0003
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#define AR_HTC_MSG_SETUP_COMPLETE 0x0004
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#define AR_HTC_MSG_CONF_PIPE 0x0005
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#define AR_HTC_MSG_CONF_PIPE_RSP 0x0006
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} __packed;
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/* Structure for services AR_SVC_WMI_DATA_{VO,VI,BE,BK}. */
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struct ar_tx_frame {
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uint8_t data_type;
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#define AR_HTC_AMPDU 1
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#define AR_HTC_NORMAL 2
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uint8_t node_idx;
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uint8_t vif_idx;
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uint8_t tid;
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uint32_t flags;
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#define AR_HTC_TX_CTSONLY 0x00000001
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#define AR_HTC_TX_RTSCTS 0x00000002
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#define AR_HTC_TX_USE_MIN_RATE 0x00000100
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uint8_t key_type;
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uint8_t key_idx;
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uint8_t reserved[26];
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} __packed;
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/* Structure for service AR_SVC_WMI_MGMT. */
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struct ar_tx_mgmt {
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uint8_t node_idx;
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uint8_t vif_idx;
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uint8_t tid;
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uint8_t flags;
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uint8_t key_type;
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uint8_t key_idx;
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uint16_t reserved;
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} __packed;
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/* Structure for service AR_SVC_WMI_BEACON. */
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struct ar_tx_bcn {
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uint8_t len_changed;
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uint8_t vif_idx;
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uint16_t rev;
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} __packed;
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/* Structure for message AR_HTC_MSG_READY. */
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struct ar_htc_msg_ready {
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uint16_t credits;
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uint16_t credits_size;
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uint8_t max_endpoints;
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uint8_t reserved;
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} __packed;
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/* Structure for message AR_HTC_MSG_CONF_PIPE. */
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struct ar_htc_msg_config_pipe {
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uint8_t pipe_id;
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uint8_t credits;
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} __packed;
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/* Structure for message AR_HTC_MSG_CONN_SVC. */
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struct ar_htc_msg_conn_svc {
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uint16_t svc_id;
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uint16_t conn_flags;
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uint8_t dl_pipeid;
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uint8_t ul_pipeid;
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uint8_t svc_meta_len;
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uint8_t reserved;
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} __packed;
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/* Structure for message AR_HTC_MSG_CONN_SVC_RSP. */
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struct ar_htc_msg_conn_svc_rsp {
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uint16_t svc_id;
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uint8_t status;
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#define AR_HTC_SVC_SUCCESS 0
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#define AR_HTC_SVC_NOT_FOUND 1
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#define AR_HTC_SVC_FAILED 2
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#define AR_HTC_SVC_NO_RESOURCES 3
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#define AR_HTC_SVC_NO_MORE_EP 4
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uint8_t endpoint_id;
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uint16_t max_msg_len;
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uint8_t svc_meta_len;
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uint8_t reserved;
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} __packed;
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#define AR_SVC(grp, idx) ((grp) << 8 | (idx))
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#define AR_SVC_IDX(svc) ((svc) & 0xff)
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/* Service groups. */
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#define AR_SVC_GRP_RSVD 0
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#define AR_SVC_GRP_WMI 1
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/* Service identifiers for WMI group. */
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#define AR_SVC_WMI_CONTROL AR_SVC(AR_SVC_GRP_WMI, 0)
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#define AR_SVC_WMI_BEACON AR_SVC(AR_SVC_GRP_WMI, 1)
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#define AR_SVC_WMI_CAB AR_SVC(AR_SVC_GRP_WMI, 2)
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#define AR_SVC_WMI_UAPSD AR_SVC(AR_SVC_GRP_WMI, 3)
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#define AR_SVC_WMI_MGMT AR_SVC(AR_SVC_GRP_WMI, 4)
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#define AR_SVC_WMI_DATA_VO AR_SVC(AR_SVC_GRP_WMI, 5)
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#define AR_SVC_WMI_DATA_VI AR_SVC(AR_SVC_GRP_WMI, 6)
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#define AR_SVC_WMI_DATA_BE AR_SVC(AR_SVC_GRP_WMI, 7)
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#define AR_SVC_WMI_DATA_BK AR_SVC(AR_SVC_GRP_WMI, 8)
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struct ar_stream_hdr {
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uint16_t len;
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uint16_t tag;
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#define AR_USB_RX_STREAM_TAG 0x4e00
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#define AR_USB_TX_STREAM_TAG 0x697e
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} __packed __attribute__((aligned(4)));
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#define AR_MAX_CHAINS 3
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/* Rx descriptor. */
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struct ar_rx_status {
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uint64_t rs_tstamp;
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uint16_t rs_datalen;
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uint8_t rs_status;
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uint8_t rs_phyerr;
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int8_t rs_rssi;
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int8_t rs_rssi_ctl[AR_MAX_CHAINS];
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int8_t rs_rssi_ext[AR_MAX_CHAINS];
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uint8_t rs_keyix;
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uint8_t rs_rate;
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uint8_t rs_antenna;
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uint8_t rs_more;
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uint8_t rs_isaggr;
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uint8_t rs_moreaggr;
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uint8_t rs_num_delims;
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uint8_t rs_flags;
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#define AR_RXS_FLAG_GI 0x04
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#define AR_RXS_FLAG_2040 0x08
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uint8_t rs_dummy;
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uint32_t rs_evm[AR_MAX_CHAINS];
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} __packed __attribute__((aligned(4)));
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/*
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* Driver definitions.
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*/
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#define ATHN_USB_RX_LIST_COUNT 1
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#define ATHN_USB_TX_LIST_COUNT (8 + 1) /* NB: +1 for beacons. */
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#define ATHN_USB_HOST_CMD_RING_COUNT 32
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#define ATHN_USB_RXBUFSZ (8 * 1024) /* XXX Linux 16K */
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#define ATHN_USB_TXBUFSZ \
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((sizeof(struct ar_stream_hdr) + \
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sizeof(struct ar_htc_frame_hdr) + \
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sizeof(struct ar_tx_frame) + \
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IEEE80211_MAX_LEN + 3) & ~3)
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#define ATHN_USB_TXCMDSZ 512
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#define ATHN_USB_TX_TIMEOUT 5000 /* ms */
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#define ATHN_USB_CMD_TIMEOUT 1000 /* ms */
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struct athn_usb_softc;
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struct athn_usb_rx_stream {
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struct mbuf *m;
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int moff;
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int left;
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};
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struct athn_usb_rx_data {
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struct athn_usb_softc *sc;
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usbd_xfer_handle xfer;
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uint8_t *buf;
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};
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struct athn_usb_tx_data {
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struct athn_usb_softc *sc;
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usbd_xfer_handle xfer;
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uint8_t *buf;
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TAILQ_ENTRY(athn_usb_tx_data) next;
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};
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struct athn_usb_host_cmd {
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void (*cb)(struct athn_usb_softc *, void *);
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uint8_t data[256];
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};
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struct athn_usb_cmd_newstate {
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enum ieee80211_state state;
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int arg;
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};
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struct athn_usb_cmd_key {
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struct ieee80211_node *ni;
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struct ieee80211_key *key;
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};
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struct athn_usb_aggr_cmd {
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uint8_t sta_index;
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uint8_t tid;
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};
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struct athn_usb_host_cmd_ring {
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struct athn_usb_host_cmd cmd[ATHN_USB_HOST_CMD_RING_COUNT];
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int cur;
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int next;
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int queued;
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};
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struct athn_usb_node {
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struct athn_node aun_an;
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/* our stuff */
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};
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struct athn_usb_softc {
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struct athn_softc usc_sc;
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#define usc_dev usc_sc.sc_dev
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int usc_athn_attached;
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kmutex_t usc_task_mtx;
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kmutex_t usc_tx_mtx;
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/* USB specific goo. */
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usbd_device_handle usc_udev;
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usbd_interface_handle usc_iface;
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struct usb_task usc_task;
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int usc_dying;
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u_int usc_flags;
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#define ATHN_USB_FLAG_NONE 0x00
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#define ATHN_USB_FLAG_AR7010 0x01
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struct athn_usb_rx_stream usc_rx_stream;
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usbd_pipe_handle usc_tx_data_pipe;
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usbd_pipe_handle usc_rx_data_pipe;
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usbd_pipe_handle usc_rx_intr_pipe;
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usbd_pipe_handle usc_tx_intr_pipe;
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uint8_t *usc_ibuf;
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struct ar_wmi_cmd_reg_write usc_wbuf[AR_MAX_WRITE_COUNT];
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int usc_wcount;
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int usc_wmi_done;
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uint16_t usc_wmi_seq_no;
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uint16_t usc_wait_cmd_id;
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uint16_t usc_wait_msg_id;
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void *usc_obuf;
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struct ar_htc_msg_conn_svc_rsp *usc_msg_conn_svc_rsp;
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struct athn_usb_host_cmd_ring usc_cmdq;
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struct athn_usb_rx_data usc_rx_data[ATHN_USB_RX_LIST_COUNT];
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struct athn_usb_tx_data usc_tx_data[ATHN_USB_TX_LIST_COUNT];
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TAILQ_HEAD(, athn_usb_tx_data) usc_tx_free_list;
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struct athn_usb_tx_data usc_tx_cmd;
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struct athn_usb_tx_data *usc_tx_bcn;
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uint8_t usc_ep_ctrl;
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uint8_t usc_ep_bcn;
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uint8_t usc_ep_cab;
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uint8_t usc_ep_uapsd;
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uint8_t usc_ep_mgmt;
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uint8_t usc_ep_data[WME_NUM_AC];
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void (*usc_node_cleanup)(struct ieee80211_node *);
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};
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#endif /* _IF_ATHN_USB_H_ */
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