434 lines
10 KiB
C
434 lines
10 KiB
C
/* $NetBSD: au8522.c,v 1.8 2017/06/01 02:45:10 chs Exp $ */
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/*-
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* Copyright (c) 2010 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Auvitek AU8522
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: au8522.c,v 1.8 2017/06/01 02:45:10 chs Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kmem.h>
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#include <sys/module.h>
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#include <dev/dtv/dtvio.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/au8522reg.h>
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#include <dev/i2c/au8522var.h>
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#include <dev/i2c/au8522mod.h>
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static int au8522_reset(struct au8522 *);
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static int au8522_read_1(struct au8522 *, uint16_t, uint8_t *);
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static int au8522_write_1(struct au8522 *, uint16_t, uint8_t);
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static int au8522_set_vinput(struct au8522 *, au8522_vinput_t);
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static int au8522_set_ainput(struct au8522 *, au8522_ainput_t);
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static void au8522_set_common(struct au8522 *, au8522_vinput_t);
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static int
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au8522_reset(struct au8522 *au)
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{
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return au8522_write_1(au, 0xa4, 1 << 5);
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}
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static int
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au8522_read_1(struct au8522 *au, uint16_t reg, uint8_t *val)
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{
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uint8_t cmd[2];
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int error;
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cmd[0] = (reg >> 8) | 0x40;
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cmd[1] = reg & 0xff;
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error = iic_exec(au->i2c, I2C_OP_WRITE, au->i2c_addr,
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cmd, sizeof(cmd), NULL, 0, 0);
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if (error)
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return error;
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return iic_exec(au->i2c, I2C_OP_READ, au->i2c_addr,
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NULL, 0, val, sizeof(*val), 0);
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}
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static int
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au8522_write_1(struct au8522 *au, uint16_t reg, uint8_t val)
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{
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uint8_t data[3];
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data[0] = (reg >> 8) | 0x80;
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data[1] = reg & 0xff;
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data[2] = val;
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return iic_exec(au->i2c, I2C_OP_WRITE, au->i2c_addr,
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data, sizeof(data), NULL, 0, 0);
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}
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static int
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au8522_set_vinput(struct au8522 *au, au8522_vinput_t vi)
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{
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switch (vi) {
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case AU8522_VINPUT_CVBS:
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au8522_write_1(au, AU8522_REG_MODCLKCTL, AU8522_MODCLKCTL_CVBS);
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au8522_write_1(au, AU8522_REG_PGACTL, 0x00);
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au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x0e);
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au8522_write_1(au, AU8522_REG_PGACTL, 0x10);
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au8522_write_1(au, AU8522_REG_INPUTCTL,
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AU8522_INPUTCTL_CVBS_CH1);
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au8522_set_common(au, vi);
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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break;
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case AU8522_VINPUT_SVIDEO:
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au8522_write_1(au, AU8522_REG_MODCLKCTL,
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AU8522_MODCLKCTL_SVIDEO);
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au8522_write_1(au, AU8522_REG_INPUTCTL,
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AU8522_INPUTCTL_SVIDEO_CH13);
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au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x00);
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au8522_set_common(au, vi);
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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break;
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case AU8522_VINPUT_CVBS_TUNER:
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au8522_write_1(au, AU8522_REG_MODCLKCTL, AU8522_MODCLKCTL_CVBS);
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au8522_write_1(au, AU8522_REG_PGACTL, 0x00);
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au8522_write_1(au, AU8522_REG_CLAMPCTL, 0x0e);
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au8522_write_1(au, AU8522_REG_PGACTL, 0x10);
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au8522_write_1(au, AU8522_REG_INPUTCTL,
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AU8522_INPUTCTL_CVBS_CH4_SIF);
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au8522_set_common(au, vi);
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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break;
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default:
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return EINVAL;
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}
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return 0;
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}
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static void
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au8522_set_common(struct au8522 *au, au8522_vinput_t vi)
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{
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au8522_write_1(au, AU8522_REG_INTMASK, 0x00);
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au8522_write_1(au, AU8522_REG_VIDEOMODE, vi == AU8522_VINPUT_SVIDEO ?
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AU8522_VIDEOMODE_SVIDEO : AU8522_VIDEOMODE_CVBS);
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au8522_write_1(au, AU8522_REG_TV_PGA, AU8522_TV_PGA_CVBS);
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}
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static int
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au8522_set_ainput(struct au8522 *au, au8522_ainput_t ai)
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{
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/* mute during mode change */
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x00);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x00);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0x00);
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switch (ai) {
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case AU8522_AINPUT_SIF:
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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au8522_write_1(au, AU8522_REG_AUDIO_MODE, 0x82);
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au8522_write_1(au, AU8522_REG_SYSMODCTL1,
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AU8522_SYSMODCTL1_I2S);
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au8522_write_1(au, AU8522_REG_AUDIO_FREQ, 0x03);
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au8522_write_1(au, AU8522_REG_I2S_CTL2, 0xc2);
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/* unmute */
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0xff);
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break;
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case AU8522_AINPUT_NONE:
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au8522_write_1(au, AU8522_REG_USBEN, 0x00);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_MODE, 0x40);
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au8522_write_1(au, AU8522_REG_SYSMODCTL1,
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AU8522_SYSMODCTL1_SVIDEO);
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au8522_write_1(au, AU8522_REG_AUDIO_FREQ, 0x03);
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au8522_write_1(au, AU8522_REG_I2S_CTL2, 0x02);
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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break;
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default:
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return EINVAL;
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}
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return 0;
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}
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static int
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au8522_set_if(struct au8522 *au)
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{
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uint8_t ifinit[3];
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unsigned int n;
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switch (au->if_freq) {
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case 6000000: /* 6MHz */
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ifinit[0] = 0xfb;
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ifinit[1] = 0x8e;
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ifinit[2] = 0x39;
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break;
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default:
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aprint_error_dev(au->parent, "au8522: unsupported if freq %dHz\n", au->if_freq);
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return EINVAL;
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}
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for (n = 0; n < __arraycount(ifinit); n++)
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au8522_write_1(au, 0x80b5 + n, ifinit[n]);
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return 0;
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}
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struct au8522 *
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au8522_open(device_t parent, i2c_tag_t i2c, i2c_addr_t addr, unsigned int if_freq)
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{
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struct au8522 *au;
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au = kmem_alloc(sizeof(*au), KM_SLEEP);
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au->parent = parent;
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au->i2c = i2c;
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au->i2c_addr = addr;
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au->current_modulation = -1;
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au->if_freq = if_freq;
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if (au8522_reset(au))
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goto failed;
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if (au8522_write_1(au, AU8522_REG_TUNERCTL, AU8522_TUNERCTL_EN))
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goto failed;
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return au;
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failed:
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kmem_free(au, sizeof(*au));
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return NULL;
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}
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void
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au8522_close(struct au8522 *au)
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{
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kmem_free(au, sizeof(*au));
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}
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void
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au8522_enable(struct au8522 *au, bool enable)
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{
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if (enable) {
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_RESET);
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delay(1000);
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_CVBS);
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} else {
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au8522_write_1(au, AU8522_REG_SYSMODCTL0,
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AU8522_SYSMODCTL0_DISABLE);
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}
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}
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void
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au8522_set_input(struct au8522 *au, au8522_vinput_t vi, au8522_ainput_t ai)
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{
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au8522_reset(au);
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if (vi != AU8522_VINPUT_UNCONF)
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au8522_set_vinput(au, vi);
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if (ai != AU8522_AINPUT_UNCONF)
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au8522_set_ainput(au, ai);
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}
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int
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au8522_get_signal(struct au8522 *au)
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{
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uint8_t status;
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if (au8522_read_1(au, AU8522_REG_STATUS, &status))
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return 0;
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#ifdef AU8522_DEBUG
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printf("au8522: status=0x%02x\n", status);
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#endif
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return (status & AU8522_STATUS_LOCK) == AU8522_STATUS_LOCK ? 1 : 0;
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}
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void
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au8522_set_audio(struct au8522 *au, bool onoff)
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{
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if (onoff) {
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x7f);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0xff);
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} else {
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_L, 0x00);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL_R, 0x00);
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au8522_write_1(au, AU8522_REG_AUDIO_VOL, 0x00);
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}
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}
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int
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au8522_set_modulation(struct au8522 *au, fe_modulation_t modulation)
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{
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const struct au8522_modulation_table *modtab = NULL;
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size_t modtablen;
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unsigned int n;
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switch (modulation) {
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case VSB_8:
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modtab = au8522_modulation_8vsb;
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modtablen = __arraycount(au8522_modulation_8vsb);
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break;
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case QAM_64:
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modtab = au8522_modulation_qam64;
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modtablen = __arraycount(au8522_modulation_qam64);
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break;
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case QAM_256:
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modtab = au8522_modulation_qam256;
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modtablen = __arraycount(au8522_modulation_qam256);
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break;
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default:
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return EINVAL;
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}
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for (n = 0; n < modtablen; n++)
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au8522_write_1(au, modtab[n].reg, modtab[n].val);
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au8522_set_if(au);
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au->current_modulation = modulation;
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return 0;
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}
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void
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au8522_set_gate(struct au8522 *au, bool onoff)
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{
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au8522_write_1(au, AU8522_REG_TUNERCTL, onoff ? AU8522_TUNERCTL_EN : 0);
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}
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fe_status_t
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au8522_get_dtv_status(struct au8522 *au)
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{
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fe_status_t status = 0;
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uint8_t val;
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switch (au->current_modulation) {
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case VSB_8:
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if (au8522_read_1(au, 0x4088, &val))
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return 0;
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if ((val & 0x03) == 0x03) {
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status |= FE_HAS_SIGNAL;
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status |= FE_HAS_CARRIER;
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status |= FE_HAS_VITERBI;
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}
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break;
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case QAM_64:
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case QAM_256:
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if (au8522_read_1(au, 0x4541, &val))
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return 0;
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if (val & 0x80) {
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status |= FE_HAS_VITERBI;
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}
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if (val & 0x20) {
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status |= FE_HAS_SIGNAL;
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status |= FE_HAS_CARRIER;
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}
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break;
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default:
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break;
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}
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if (status & FE_HAS_VITERBI) {
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status |= FE_HAS_SYNC;
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status |= FE_HAS_LOCK;
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}
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return status;
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}
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uint16_t
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au8522_get_snr(struct au8522 *au)
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{
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const struct au8522_snr_table *snrtab = NULL;
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uint16_t snrreg;
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uint8_t val;
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size_t snrtablen;
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unsigned int n;
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switch (au->current_modulation) {
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case VSB_8:
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snrtab = au8522_snr_8vsb;
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snrtablen = __arraycount(au8522_snr_8vsb);
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snrreg = AU8522_REG_SNR_VSB;
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break;
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case QAM_64:
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snrtab = au8522_snr_qam64;
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snrtablen = __arraycount(au8522_snr_qam64);
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snrreg = AU8522_REG_SNR_QAM;
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break;
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case QAM_256:
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snrtab = au8522_snr_qam256;
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snrtablen = __arraycount(au8522_snr_qam256);
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snrreg = AU8522_REG_SNR_QAM;
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break;
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default:
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return 0;
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}
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if (au8522_read_1(au, snrreg, &val))
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return 0;
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for (n = 0; n < snrtablen; n++) {
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if (val < snrtab[n].val)
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return snrtab[n].snr;
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}
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return 0;
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}
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MODULE(MODULE_CLASS_DRIVER, au8522, "i2cexec");
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static int
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au8522_modcmd(modcmd_t cmd, void *opaque)
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{
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switch (cmd) {
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case MODULE_CMD_INIT:
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return 0;
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case MODULE_CMD_FINI:
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return 0;
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default:
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return ENOTTY;
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}
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}
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