538 lines
15 KiB
C
538 lines
15 KiB
C
/* $NetBSD: sec.c,v 1.15 2009/05/11 20:13:49 bjh21 Exp $ */
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/*-
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* Copyright (c) 2000, 2001, 2006 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* sec.c -- driver for Acorn SCSI expansion cards (AKA30, AKA31, AKA32)
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*
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* These cards are documented in:
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* Acorn Archimedes 500 series / Acorn R200 series Technical Reference Manual
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* Published by Acorn Computers Limited
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* ISBN 1 85250 086 7
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* Part number 0486,052
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* Issue 1, November 1990
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sec.c,v 1.15 2009/05/11 20:13:49 bjh21 Exp $");
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#include <sys/param.h>
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#include <sys/buf.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/reboot.h> /* For bootverbose */
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#include <sys/syslog.h>
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#include <sys/systm.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <sys/bus.h>
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#include <dev/ic/wd33c93reg.h>
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#include <dev/ic/wd33c93var.h>
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#include <dev/ic/nec71071reg.h>
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#include <dev/podulebus/podulebus.h>
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#include <dev/podulebus/podules.h>
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#include <dev/podulebus/powerromreg.h>
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#include <dev/podulebus/secreg.h>
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#include "opt_ddb.h"
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struct sec_softc {
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struct wd33c93_softc sc_sbic;
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bus_space_tag_t sc_pod_t;
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bus_space_handle_t sc_pod_h;
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bus_space_tag_t sc_mod_t;
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bus_space_handle_t sc_mod_h;
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void *sc_ih;
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struct evcnt sc_intrcnt;
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uint8_t sc_mpr;
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/* Details of the current DMA transfer */
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bool sc_dmaactive;
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void * sc_dmaaddr;
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int sc_dmaoff;
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size_t sc_dmalen;
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bool sc_dmain;
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/* Details of the current block within the above transfer */
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size_t sc_dmablk;
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};
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#define SEC_DMABLK 16384
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#define SEC_NBLKS 3
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#define SEC_DMAMODE MODE_TMODE_DMD
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/* autoconfiguration glue */
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static int sec_match(device_t, cfdata_t, void *);
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static void sec_attach(device_t, device_t, void *);
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/* shutdown hook */
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static bool sec_shutdown(device_t, int);
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/* callbacks from MI WD33C93 driver */
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static int sec_dmasetup(struct wd33c93_softc *, void **, size_t *, int,
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size_t *);
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static int sec_dmago(struct wd33c93_softc *);
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static void sec_dmastop(struct wd33c93_softc *);
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static void sec_reset(struct wd33c93_softc *);
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static int sec_intr(void *);
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static int sec_dmatc(struct sec_softc *sc);
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void sec_dumpdma(void *arg);
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CFATTACH_DECL_NEW(sec, sizeof(struct sec_softc),
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sec_match, sec_attach, NULL, NULL);
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static inline void
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sec_setpage(struct sec_softc *sc, int page)
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{
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sc->sc_mpr = (sc->sc_mpr & ~SEC_MPR_PAGE) | page;
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_MPR, sc->sc_mpr);
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}
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static inline void
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sec_cli(struct sec_softc *sc)
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{
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_CLRINT, 0);
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}
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static inline void
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dmac_write(struct sec_softc *sc, int reg, uint8_t val)
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{
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bus_space_write_1(sc->sc_mod_t, sc->sc_mod_h,
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SEC_DMAC + DMAC(reg), val);
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}
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static inline uint8_t
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dmac_read(struct sec_softc *sc, int reg)
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{
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return bus_space_read_1(sc->sc_mod_t, sc->sc_mod_h,
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SEC_DMAC + DMAC(reg));
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}
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static int
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sec_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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/* Standard ROM, skipping the MCS card that used the same ID. */
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if (pa->pa_product == PODULE_ACORN_SCSI &&
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strncmp(pa->pa_descr, "MCS", 3) != 0)
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return 1;
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/* PowerROM */
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if (pa->pa_product == PODULE_ALSYSTEMS_SCSI &&
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podulebus_initloader(pa) == 0 &&
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podloader_callloader(pa, 0, 0) == PRID_ACORN_SCSI1)
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return 1;
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return 0;
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}
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static void
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sec_attach(device_t parent, device_t self, void *aux)
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{
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struct podulebus_attach_args *pa = aux;
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struct sec_softc *sc = device_private(self);
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int i;
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sc->sc_sbic.sc_dev = self;
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/* Set up bus spaces */
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sc->sc_pod_t = pa->pa_fast_t;
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bus_space_map(pa->pa_fast_t, pa->pa_fast_base, 0x1000, 0,
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&sc->sc_pod_h);
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sc->sc_mod_t = pa->pa_mod_t;
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bus_space_map(pa->pa_mod_t, pa->pa_mod_base, 0x1000, 0,
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&sc->sc_mod_h);
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sc->sc_sbic.sc_regt = sc->sc_mod_t;
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bus_space_subregion(sc->sc_mod_t, sc->sc_mod_h, SEC_SBIC + 0, 1,
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&sc->sc_sbic.sc_asr_regh);
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bus_space_subregion(sc->sc_mod_t, sc->sc_mod_h, SEC_SBIC + 1, 1,
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&sc->sc_sbic.sc_data_regh);
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sc->sc_sbic.sc_id = 7;
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sc->sc_sbic.sc_clkfreq = SEC_CLKFREQ;
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sc->sc_sbic.sc_dmamode = SBIC_CTL_BURST_DMA;
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sc->sc_sbic.sc_adapter.adapt_request = wd33c93_scsi_request;
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sc->sc_sbic.sc_adapter.adapt_minphys = minphys;
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sc->sc_sbic.sc_dmasetup = sec_dmasetup;
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sc->sc_sbic.sc_dmago = sec_dmago;
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sc->sc_sbic.sc_dmastop = sec_dmastop;
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sc->sc_sbic.sc_reset = sec_reset;
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sc->sc_mpr = 0;
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_MPR, sc->sc_mpr);
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for (i = 0; i < SEC_NPAGES; i++) {
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sec_setpage(sc, i);
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bus_space_set_region_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM, 0, SEC_PAGESIZE / 2);
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}
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wd33c93_attach(&sc->sc_sbic);
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evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
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device_xname(self), "intr");
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sc->sc_ih = podulebus_irq_establish(pa->pa_ih, IPL_BIO, sec_intr,
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sc, &sc->sc_intrcnt);
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sec_cli(sc);
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sc->sc_mpr |= SEC_MPR_IE;
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_MPR, sc->sc_mpr);
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pmf_device_register1(sc->sc_sbic.sc_dev, NULL, NULL, sec_shutdown);
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}
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/*
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* Before reboot, reset the page register to 0 so that RISC OS can see
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* the podule ROM.
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*/
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static bool
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sec_shutdown(device_t dev, int howto)
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{
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struct sec_softc *sc = device_private(dev);
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sec_setpage(sc, 0);
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return true;
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}
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static void
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sec_copyin(struct sec_softc *sc, void *dest, int src, size_t size)
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{
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uint16_t tmp, *wptr;
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int cnt, extra_byte;
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KASSERT(src >= 0);
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KASSERT(src + size <= SEC_MEMSIZE);
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if (src % 2 != 0) {
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/*
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* There's a stray byte at the start. Read the word
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* containing it.
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*/
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sec_setpage(sc, src / SEC_PAGESIZE);
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tmp = bus_space_read_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + (src % SEC_PAGESIZE / 2));
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*(uint8_t *)dest = tmp >> 8;
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dest = ((uint8_t *)dest) + 1;
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src++; size--;
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}
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KASSERT(src % 2 == 0);
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KASSERT(ALIGNED_POINTER(dest, uint16_t));
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wptr = dest;
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extra_byte = size % 2;
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size -= extra_byte;
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while (size > 0) {
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cnt = SEC_PAGESIZE - src % SEC_PAGESIZE;
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if (cnt > size)
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cnt = size;
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sec_setpage(sc, src / SEC_PAGESIZE);
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/* bus ops are in words */
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bus_space_read_region_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + src % SEC_PAGESIZE / 2, wptr, cnt / 2);
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src += cnt;
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wptr += cnt / 2;
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size -= cnt;
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}
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if (extra_byte) {
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sec_setpage(sc, src / SEC_PAGESIZE);
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*(u_int8_t *)wptr =
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bus_space_read_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + src % SEC_PAGESIZE / 2) & 0xff;
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}
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}
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static void
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sec_copyout(struct sec_softc *sc, const void *src, int dest, size_t size)
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{
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int cnt, extra_byte;
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const uint16_t *wptr;
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uint16_t tmp;
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KASSERT(dest >= 0);
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KASSERT(dest + size <= SEC_MEMSIZE);
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if (dest % 2 != 0) {
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/*
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* There's a stray byte at the start. Read the word
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* containing it.
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*/
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sec_setpage(sc, dest / SEC_PAGESIZE);
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tmp = bus_space_read_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + (dest % SEC_PAGESIZE / 2));
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tmp &= 0xff;
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tmp |= *(uint8_t const *)src << 8;
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bus_space_write_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + (dest % SEC_PAGESIZE / 2), tmp);
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src = ((uint8_t const *)src) + 1;
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dest++; size--;
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}
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KASSERT(dest % 2 == 0);
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KASSERT(ALIGNED_POINTER(src, uint16_t));
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wptr = src;
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extra_byte = size % 2;
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size -= extra_byte;
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while (size > 0) {
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cnt = SEC_PAGESIZE - dest % SEC_PAGESIZE;
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if (cnt > size)
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cnt = size;
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sec_setpage(sc, dest / SEC_PAGESIZE);
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/* bus ops are in words */
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bus_space_write_region_2(sc->sc_mod_t, sc->sc_mod_h,
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dest % SEC_PAGESIZE / 2, wptr, cnt / 2);
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wptr += cnt / 2;
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dest += cnt;
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size -= cnt;
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}
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if (extra_byte) {
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/*
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* There's a stray byte at the end. Read the word
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* containing it.
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*/
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sec_setpage(sc, dest / SEC_PAGESIZE);
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tmp = bus_space_read_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + (dest % SEC_PAGESIZE / 2));
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tmp &= 0xff00;
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tmp |= *(uint8_t const *)wptr;
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bus_space_write_2(sc->sc_mod_t, sc->sc_mod_h,
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SEC_SRAM + (dest % SEC_PAGESIZE / 2), tmp);
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}
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}
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static void
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sec_dmablk(struct sec_softc *sc, int blk)
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{
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int off;
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size_t len;
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KASSERT(blk >= 0);
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KASSERT(blk * SEC_DMABLK < sc->sc_dmalen);
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off = (blk % SEC_NBLKS) * SEC_DMABLK + sc->sc_dmaoff;
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len = MIN(SEC_DMABLK, sc->sc_dmalen - (blk * SEC_DMABLK));
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dmac_write(sc, NEC71071_ADDRLO, off & 0xff);
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dmac_write(sc, NEC71071_ADDRMID, off >> 8);
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dmac_write(sc, NEC71071_ADDRHI, 0);
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/*
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* "Note: The number of DMA transfer cycles is actually the
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* value of the current count register + 1. Therefore, when
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* programming the count register, specify the number of DMA
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* transfers minus one." -- uPD71071 datasheet
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*/
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dmac_write(sc, NEC71071_COUNTLO, (len - 1) & 0xff);
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dmac_write(sc, NEC71071_COUNTHI, (len - 1) >> 8);
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}
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static void
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sec_copyoutblk(struct sec_softc *sc, int blk)
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{
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int off;
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size_t len;
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KASSERT(blk >= 0);
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KASSERT(blk * SEC_DMABLK < sc->sc_dmalen);
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KASSERT(!sc->sc_dmain);
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off = (blk % SEC_NBLKS) * SEC_DMABLK + sc->sc_dmaoff;
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len = MIN(SEC_DMABLK, sc->sc_dmalen - (blk * SEC_DMABLK));
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sec_copyout(sc, (char*)sc->sc_dmaaddr + (blk * SEC_DMABLK), off, len);
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}
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static void
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sec_copyinblk(struct sec_softc *sc, int blk)
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{
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int off;
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size_t len;
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KASSERT(blk >= 0);
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KASSERT(blk * SEC_DMABLK < sc->sc_dmalen);
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KASSERT(sc->sc_dmain);
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off = (blk % SEC_NBLKS) * SEC_DMABLK + sc->sc_dmaoff;
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len = MIN(SEC_DMABLK, sc->sc_dmalen - (blk * SEC_DMABLK));
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sec_copyin(sc, (char*)sc->sc_dmaaddr + (blk * SEC_DMABLK), off, len);
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}
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static int
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sec_dmasetup(struct wd33c93_softc *sc_sbic, void **addr, size_t *len,
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int datain, size_t *dmasize)
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{
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struct sec_softc *sc = (struct sec_softc *)sc_sbic;
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uint8_t mode;
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sc->sc_dmaaddr = *addr;
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sc->sc_dmaoff = ALIGNED_POINTER(*addr, uint16_t) ? 0 : 1;
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sc->sc_dmalen = *len;
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sc->sc_dmain = datain;
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sc->sc_dmablk = 0;
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mode = SEC_DMAMODE | (datain ? MODE_TDIR_IOTM : MODE_TDIR_MTIO);
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/* Program first block into DMAC and queue up second. */
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dmac_write(sc, NEC71071_CHANNEL, 0);
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if (!sc->sc_dmain)
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sec_copyoutblk(sc, 0);
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sec_dmablk(sc, 0);
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/* Mode control register */
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dmac_write(sc, NEC71071_MODE, mode);
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return sc->sc_dmalen;
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}
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static int
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sec_dmago(struct wd33c93_softc *sc_sbic)
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{
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struct sec_softc *sc = (struct sec_softc *)sc_sbic;
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dmac_write(sc, NEC71071_MASK, 0xe);
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sc->sc_dmaactive = true;
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if (!sc->sc_dmain && sc->sc_dmalen > SEC_DMABLK)
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sec_copyoutblk(sc, 1);
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return sc->sc_dmalen;
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}
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static void
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sec_dmastop(struct wd33c93_softc *sc_sbic)
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{
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struct sec_softc *sc = (struct sec_softc *)sc_sbic;
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dmac_write(sc, NEC71071_MASK, 0xf);
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if (sc->sc_dmaactive && sc->sc_dmain)
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sec_copyinblk(sc, sc->sc_dmablk);
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sc->sc_dmaactive = false;
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}
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/*
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* Reset the SCSI bus, and incidentally the SBIC and DMAC.
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*/
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static void
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sec_reset(struct wd33c93_softc *sc_sbic)
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{
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struct sec_softc *sc = (struct sec_softc *)sc_sbic;
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uint8_t asr, csr;
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_MPR,
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sc->sc_mpr | SEC_MPR_UR);
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DELAY(7);
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bus_space_write_1(sc->sc_pod_t, sc->sc_pod_h, SEC_MPR, sc->sc_mpr);
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/* Wait for and clear the reset-complete interrupt */
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do
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GET_SBIC_asr(sc_sbic, asr);
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while (!(asr & SBIC_ASR_INT));
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GET_SBIC_csr(sc_sbic, csr);
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dmac_write(sc, NEC71071_DCTRL1, DCTRL1_CMP | DCTRL1_RQL);
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dmac_write(sc, NEC71071_DCTRL2, 0);
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sec_cli(sc);
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}
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static int
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sec_intr(void *arg)
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{
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struct sec_softc *sc = arg;
|
|
u_int8_t isr;
|
|
|
|
isr = bus_space_read_1(sc->sc_pod_t, sc->sc_pod_h, SEC_ISR);
|
|
if (!(isr & SEC_ISR_IRQ))
|
|
return 0;
|
|
if (isr & SEC_ISR_DMAC)
|
|
sec_dmatc(sc);
|
|
if (isr & SEC_ISR_SBIC)
|
|
wd33c93_intr(&sc->sc_sbic);
|
|
return 1;
|
|
}
|
|
|
|
static int
|
|
sec_dmatc(struct sec_softc *sc)
|
|
{
|
|
|
|
sec_cli(sc);
|
|
/* DMAC finished block n-1 and is now working on block n */
|
|
sc->sc_dmablk++;
|
|
if (sc->sc_dmalen > sc->sc_dmablk * SEC_DMABLK) {
|
|
dmac_write(sc, NEC71071_CHANNEL, 0);
|
|
sec_dmablk(sc, sc->sc_dmablk);
|
|
dmac_write(sc, NEC71071_MASK, 0xe);
|
|
if (!sc->sc_dmain &&
|
|
sc->sc_dmalen > (sc->sc_dmablk + 1) * SEC_DMABLK)
|
|
sec_copyoutblk(sc, sc->sc_dmablk + 1);
|
|
} else {
|
|
/* All blocks fully processed. */
|
|
sc->sc_dmaactive = false;
|
|
}
|
|
if (sc->sc_dmain)
|
|
sec_copyinblk(sc, sc->sc_dmablk - 1);
|
|
return 1;
|
|
}
|
|
|
|
#ifdef DDB
|
|
void
|
|
sec_dumpdma(void *arg)
|
|
{
|
|
struct sec_softc *sc = arg;
|
|
|
|
dmac_write(sc, NEC71071_CHANNEL, 0);
|
|
printf("%s: DMA state: cur count %02x%02x cur addr %02x%02x%02x ",
|
|
device_xname(sc->sc_sbic.sc_dev),
|
|
dmac_read(sc, NEC71071_COUNTHI), dmac_read(sc, NEC71071_COUNTLO),
|
|
dmac_read(sc, NEC71071_ADDRHI), dmac_read(sc, NEC71071_ADDRMID),
|
|
dmac_read(sc, NEC71071_ADDRLO));
|
|
dmac_write(sc, NEC71071_CHANNEL, 0 | CHANNEL_WBASE);
|
|
printf("base count %02x%02x base addr %02x%02x%02x\n",
|
|
dmac_read(sc, NEC71071_COUNTHI), dmac_read(sc, NEC71071_COUNTLO),
|
|
dmac_read(sc, NEC71071_ADDRHI), dmac_read(sc, NEC71071_ADDRMID),
|
|
dmac_read(sc, NEC71071_ADDRLO));
|
|
printf("%s: DMA state: dctrl %1x%02x mode %02x status %02x req %02x "
|
|
"mask %02x\n",
|
|
device_xname(sc->sc_sbic.sc_dev), dmac_read(sc, NEC71071_DCTRL2),
|
|
dmac_read(sc, NEC71071_DCTRL1), dmac_read(sc, NEC71071_MODE),
|
|
dmac_read(sc, NEC71071_STATUS), dmac_read(sc, NEC71071_REQUEST),
|
|
dmac_read(sc, NEC71071_MASK));
|
|
printf("%s: soft DMA state: %zd@%p%s%d\n",
|
|
device_xname(sc->sc_sbic.sc_dev),
|
|
sc->sc_dmalen, sc->sc_dmaaddr, sc->sc_dmain ? "<-" : "->",
|
|
sc->sc_dmaoff);
|
|
}
|
|
|
|
void sec_dumpall(void); /* Call from DDB */
|
|
|
|
extern struct cfdriver sec_cd;
|
|
|
|
void sec_dumpall(void)
|
|
{
|
|
int i;
|
|
struct sec_softc *sc;
|
|
|
|
for (i = 0; i < sec_cd.cd_ndevs; ++i) {
|
|
sc = device_lookup_private(&sec_cd, i);
|
|
if (sc != NULL)
|
|
sec_dumpdma(sc);
|
|
}
|
|
}
|
|
#endif
|