642 lines
14 KiB
C
642 lines
14 KiB
C
/* $NetBSD: tga.c,v 1.3 1995/11/23 02:38:25 cgd Exp $ */
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/*
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* Copyright (c) 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/conf.h>
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#include <dev/rcons/raster.h>
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#include <dev/pseudo/rcons.h>
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#include <dev/pseudo/ansicons.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <alpha/pci/tgareg.h>
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#include <alpha/pci/tgavar.h>
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#include <alpha/pci/bt485reg.h>
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#include <alpha/pci/wsconsvar.h>
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#include <machine/autoconf.h>
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#include <machine/pte.h>
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int tgamatch __P((struct device *, void *, void *));
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void tgaattach __P((struct device *, struct device *, void *));
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struct cfdriver tgacd = {
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NULL, "tga", tgamatch, tgaattach, DV_DULL, sizeof(struct tga_softc)
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};
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int tga_identify __P((tga_reg_t *));
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__const struct tga_conf *tga_getconf __P((int));
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void tga_getdevconfig __P((__const struct pci_conf_fns *, void *,
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__const struct pci_mem_fns *, void *,
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pci_conftag_t tag, struct tga_devconfig *dc));
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void tga_bell __P((void *)); /* XXX */
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struct tga_devconfig tga_console_dc;
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#if 0
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dev_decl(tga, mmap);
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dev_decl(tga, ioctl);
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#endif
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struct ansicons_functions tga_acf = {
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tga_bell,
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rcons_cursor, /* could use hardware cursor; who cares? */
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rcons_putstr,
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rcons_copycols,
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rcons_erasecols,
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rcons_copyrows,
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rcons_eraserows,
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};
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#define TGAUNIT(dev) minor(dev)
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void tga_builtin_set_cpos __P((struct tga_devconfig *, int, int));
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void tga_builtin_get_cpos __P((struct tga_devconfig *, int *, int *));
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__const struct tga_ramdac_conf tga_ramdac_bt463 = {
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"Bt463",
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tga_builtin_set_cpos,
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tga_builtin_get_cpos,
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/* XXX */
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};
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void tga_bt485_wr_reg __P((volatile tga_reg_t *, u_int, u_int8_t));
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u_int8_t tga_bt485_rd_reg __P((volatile tga_reg_t *, u_int));
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void tga_bt485_set_cpos __P((struct tga_devconfig *, int, int));
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void tga_bt485_get_cpos __P((struct tga_devconfig *, int *, int *));
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__const struct tga_ramdac_conf tga_ramdac_bt485 = {
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"Bt485",
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tga_bt485_set_cpos,
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tga_bt485_get_cpos,
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/* XXX */
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};
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#undef KB
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#define KB * 1024
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#undef MB
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#define MB * 1024 * 1024
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__const struct tga_conf tga_configs[TGA_TYPE_UNKNOWN] = {
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/* TGA_TYPE_T8_01 */
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{
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"T8-01",
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&tga_ramdac_bt485,
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8,
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4 MB,
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2 KB,
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1, { 2 MB, 0 }, { 1 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T8_02 */
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{
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"T8-02",
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&tga_ramdac_bt485,
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8,
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4 MB,
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4 KB,
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1, { 2 MB, 0 }, { 2 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T8_22 */
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{
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"T8-22",
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&tga_ramdac_bt485,
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8,
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8 MB,
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4 KB,
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1, { 4 MB, 0 }, { 2 MB, 0 },
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1, { 6 MB, 0 }, { 2 MB, 0 },
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},
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/* TGA_TYPE_T8_44 */
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{
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"T8-44",
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&tga_ramdac_bt485,
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8,
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16 MB,
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4 KB,
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2, { 8 MB, 12 MB }, { 2 MB, 2 MB },
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2, { 10 MB, 14 MB }, { 2 MB, 2 MB },
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},
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/* TGA_TYPE_T32_04 */
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{
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"T32-04",
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&tga_ramdac_bt463,
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32,
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16 MB,
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8 KB,
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1, { 8 MB, 0 }, { 4 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T32_08 */
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{
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"T32-08",
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&tga_ramdac_bt463,
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32,
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16 MB,
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16 KB,
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1, { 8 MB, 0 }, { 8 MB, 0 },
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0, { 0, 0 }, { 0, 0 },
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},
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/* TGA_TYPE_T32_88 */
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{
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"T32-88",
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&tga_ramdac_bt463,
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32,
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32 MB,
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16 KB,
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1, { 16 MB, 0 }, { 8 MB, 0 },
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1, { 24 MB, 0 }, { 8 MB, 0 },
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},
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};
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#undef KB
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#undef MB
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int
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tgamatch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct pcidev_attach_args *pda = aux;
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if (PCI_VENDOR(pda->pda_id) != PCI_VENDOR_DEC ||
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PCI_PRODUCT(pda->pda_id) != PCI_PRODUCT_DEC_21030)
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return (0);
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return (1);
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}
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int
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tga_identify(regs)
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tga_reg_t *regs;
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{
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int type;
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int deep, addrmask, wide;
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deep = (regs[TGA_REG_GDER] & 0x1) != 0; /* XXX */
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addrmask = ((regs[TGA_REG_GDER] >> 2) & 0x7); /* XXX */
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wide = (regs[TGA_REG_GDER] & 0x200) == 0; /* XXX */
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type = TGA_TYPE_UNKNOWN;
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if (!deep) {
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/* 8bpp frame buffer */
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if (addrmask == 0x0) {
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/* 4MB core map; T8-01 or T8-02 */
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if (!wide)
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type = TGA_TYPE_T8_01;
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else
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type = TGA_TYPE_T8_02;
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} else if (addrmask == 0x1) {
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/* 8MB core map; T8-22 */
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if (wide) /* sanity */
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type = TGA_TYPE_T8_22;
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} else if (addrmask == 0x3) {
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/* 16MB core map; T8-44 */
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if (wide) /* sanity */
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type = TGA_TYPE_T8_44;
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}
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} else {
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/* 32bpp frame buffer */
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if (addrmask == 0x3) {
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/* 16MB core map; T32-04 or T32-08 */
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if (!wide)
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type = TGA_TYPE_T32_04;
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else
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type = TGA_TYPE_T32_08;
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} else if (addrmask == 0x7) {
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/* 32MB core map; T32-88 */
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if (wide) /* sanity */
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type = TGA_TYPE_T32_88;
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}
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}
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return (type);
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}
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__const struct tga_conf *
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tga_getconf(type)
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int type;
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{
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if (type >= 0 && type < TGA_TYPE_UNKNOWN)
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return &tga_configs[type];
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return (NULL);
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}
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void
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tga_getdevconfig(pcf, pcfa, pmf, pmfa, tag, dc)
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__const struct pci_conf_fns *pcf;
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__const struct pci_mem_fns *pmf;
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void *pcfa, *pmfa;
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pci_conftag_t tag;
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struct tga_devconfig *dc;
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{
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__const struct tga_conf *tgac;
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__const struct tga_ramdac_conf *tgar;
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struct raster *rap;
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struct rcons *rcp;
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pci_msize_t pcisize;
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int i, cacheable;
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dc->dc_pcf = pcf;
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dc->dc_pcfa = pcfa;
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dc->dc_pmf = pmf;
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dc->dc_pmfa = pmfa;
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dc->dc_pcitag = tag;
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/* XXX MAGIC NUMBER */
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PCI_FIND_MEM(pcf, pcfa, tag, 0x10, &dc->dc_pcipaddr, &pcisize,
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&cacheable);
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if (!cacheable) /* sanity */
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panic("tga_getdevconfig: memory not cacheable?");
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dc->dc_vaddr = PCI_MEM_MAP(pmf, pmfa, dc->dc_pcipaddr, pcisize, 1);
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if (dc->dc_vaddr == 0)
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return;
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dc->dc_paddr = k0segtophys(dc->dc_vaddr); /* XXX */
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dc->dc_regs = (tga_reg_t *)(dc->dc_vaddr + TGA_MEM_CREGS);
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dc->dc_tga_type = tga_identify(dc->dc_regs);
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tgac = dc->dc_tgaconf = tga_getconf(dc->dc_tga_type);
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if (tgac == NULL)
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return;
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#if 0
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/* XXX on the Alpha, pcisize = 4 * cspace_size. */
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if (tgac->tgac_cspace_size != pcisize) /* sanity */
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panic("tga_getdevconfig: memory size mismatch?");
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#endif
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tgar = tgac->tgac_ramdac;
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switch (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) { /* XXX */
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case 0:
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dc->dc_wid = 8192;
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break;
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case 1:
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dc->dc_wid = 8196;
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break;
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default:
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dc->dc_wid = (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) * 4; /* XXX */
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break;
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}
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dc->dc_rowbytes = dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
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if ((dc->dc_regs[TGA_REG_VHCR] & 0x00000001) != 0 && /* XXX */
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(dc->dc_regs[TGA_REG_VHCR] & 0x80000000) != 0) /* XXX */
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dc->dc_wid -= 4;
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dc->dc_ht = (dc->dc_regs[TGA_REG_VVCR] & 0x7ff); /* XXX */
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/* XXX this seems to be what DEC does */
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dc->dc_regs[TGA_REG_VVBR] = 1;
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dc->dc_videobase = dc->dc_vaddr + tgac->tgac_dbuf[0] +
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1 * tgac->tgac_vvbr_units;
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/*
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* Set all bits in the pixel mask, to enable writes to all pixels.
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* It seems that the console firmware clears some of them
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* under some circumstances, which causes cute vertical stripes.
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*/
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dc->dc_regs[TGA_REG_GPXR_P] = 0xffffffff;
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/* disable the cursor */
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(*tgar->tgar_set_cpos)(dc, TGA_CURSOR_OFF, 0);
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/* init black and white color map entries to 'sane' values. */
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#if 0
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(*tgar->tga_set_cmap)(dc, 0, 0, 0, 0);
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(*tgar->tga_set_cmap)(dc, 255, 0xff, 0xff, 0xff);
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#endif
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/* clear the screen */
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for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
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*(u_int32_t *)(dc->dc_videobase + i) = 0;
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/* initialize the raster */
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rap = &dc->dc_raster;
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rap->width = dc->dc_wid;
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rap->height = dc->dc_ht;
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rap->depth = tgac->tgac_phys_depth;
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rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
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rap->pixels = (u_int32_t *)dc->dc_videobase;
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/* initialize the raster console blitter */
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rcp = &dc->dc_rcons;
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rcp->rc_sp = rap;
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rcp->rc_crow = rcp->rc_ccol = -1;
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rcp->rc_crowp = &rcp->rc_crow;
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rcp->rc_ccolp = &rcp->rc_ccol;
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rcons_init(rcp, 34, 80);
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}
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void
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tgaattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pcidev_attach_args *pda = aux;
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struct tga_softc *sc = (struct tga_softc *)self;
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pci_revision_t rev;
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int console;
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console = (pda->pda_tag == tga_console_dc.dc_pcitag);
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if (console)
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sc->sc_dc = &tga_console_dc;
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else {
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sc->sc_dc = (struct tga_devconfig *)
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malloc(sizeof(struct tga_devconfig), M_DEVBUF, M_WAITOK);
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tga_getdevconfig(pda->pda_conffns, pda->pda_confarg,
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pda->pda_memfns, pda->pda_memarg, pda->pda_tag, sc->sc_dc);
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}
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if (sc->sc_dc->dc_vaddr == NULL) {
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printf(": couldn't map memory space; punt!\n");
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return;
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}
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printf(": DC21030 ");
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rev = PCI_REVISION(pda->pda_class);
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switch (rev) {
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case 1: case 2: case 3:
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printf("step %c", 'A' + rev - 1);
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break;
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default:
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printf("unknown stepping (0x%x)", rev);
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break;
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}
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printf(", ");
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if (sc->sc_dc->dc_tgaconf == NULL) {
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printf("unknown board configuration\n");
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return;
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}
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printf("board type %s\n", sc->sc_dc->dc_tgaconf->tgac_name);
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printf("%s: %d x %d, %dbpp, %s RAMDAC\n", sc->sc_dev.dv_xname,
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sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
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sc->sc_dc->dc_tgaconf->tgac_phys_depth,
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sc->sc_dc->dc_tgaconf->tgac_ramdac->tgar_name);
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#if 0
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/* XXX intr foo? */
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#endif
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if (!wscattach_output(self, console, &sc->sc_dc->dc_ansicons, &tga_acf,
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&sc->sc_dc->dc_rcons, sc->sc_dc->dc_rcons.rc_maxrow,
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sc->sc_dc->dc_rcons.rc_maxcol, 0, 0)) {
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panic("tgaattach: wscattach failed");
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/* NOTREACHED */
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}
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}
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#if 0
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int
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tgaioctl(dev, cmd, data, flag, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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struct tga_softc *sc = tgacd.cd_devs[TGAUNIT(dev)];
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return (ENOTTY);
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}
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int
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tgammap(dev, offset, nprot)
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dev_t dev;
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int offset;
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int nprot;
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{
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struct tga_softc *sc = tgacd.cd_devs[TGAUNIT(dev)];
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if (offset > sc->sc_dc->dc_tgaconf->tgac_cspace_size)
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return -1;
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return alpha_btop(sc->sc_dc->dc_paddr + offset);
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}
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#endif
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void
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tga_bell(id)
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void *id;
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{
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/* XXX */
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printf("tga_bell: not implemented\n");
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}
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void
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tga_builtin_set_cpos(dc, x, y)
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struct tga_devconfig *dc;
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int x, y;
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{
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if (x == TGA_CURSOR_OFF || y == TGA_CURSOR_OFF) {
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dc->dc_regs[TGA_REG_VVVR] &= ~0x04; /* XXX */
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wbflush();
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return;
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}
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/*
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* TGA builtin cursor is 0-based, and position is top-left corner.
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*/
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dc->dc_regs[TGA_REG_CXYR] =
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(x & 0xfff) | ((y & 0xfff) << 12); /* XXX */
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wbflush();
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}
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void
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tga_builtin_get_cpos(dc, xp, yp)
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struct tga_devconfig *dc;
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int *xp, *yp;
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{
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tga_reg_t regval;
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if ((dc->dc_regs[TGA_REG_VVVR] & 0x04) == 0) { /* XXX */
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*xp = *yp = TGA_CURSOR_OFF;
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return;
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}
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|
|
regval = dc->dc_regs[TGA_REG_CXYR];
|
|
*xp = regval & 0xfff; /* XXX */
|
|
*yp = (regval >> 12) & 0xfff; /* XXX */
|
|
}
|
|
|
|
/*
|
|
* Bt485-specific functions.
|
|
*/
|
|
|
|
void
|
|
tga_bt485_wr_reg(tgaregs, btreg, val)
|
|
volatile tga_reg_t *tgaregs;
|
|
u_int btreg;
|
|
u_int8_t val;
|
|
{
|
|
|
|
if (btreg > BT485_REG_MAX)
|
|
panic("tga_bt485_wr_reg: reg %d out of range\n", btreg);
|
|
|
|
tgaregs[TGA_REG_EPDR] = (btreg << 9) | (0 << 8 ) | val; /* XXX */
|
|
wbflush();
|
|
}
|
|
|
|
u_int8_t
|
|
tga_bt485_rd_reg(tgaregs, btreg)
|
|
volatile tga_reg_t *tgaregs;
|
|
u_int btreg;
|
|
{
|
|
tga_reg_t rdval;
|
|
|
|
if (btreg > BT485_REG_MAX)
|
|
panic("tga_bt485_rd_reg: reg %d out of range\n", btreg);
|
|
|
|
tgaregs[TGA_REG_EPSR] = (btreg << 1) | 0x1; /* XXX */
|
|
wbflush();
|
|
|
|
rdval = tgaregs[TGA_REG_EPDR];
|
|
return (rdval >> 16) & 0xff; /* XXX */
|
|
}
|
|
|
|
void
|
|
tga_bt485_set_cpos(dc, x, y)
|
|
struct tga_devconfig *dc;
|
|
int x, y;
|
|
{
|
|
|
|
if (x == TGA_CURSOR_OFF || y == TGA_CURSOR_OFF) {
|
|
u_int8_t regval;
|
|
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_COMMAND_2);
|
|
regval &= ~0x03; /* XXX */
|
|
regval |= 0x00; /* XXX */
|
|
tga_bt485_wr_reg(dc->dc_regs, BT485_REG_COMMAND_2, regval);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* RAMDAC cursors are 1-based, and position is bottom-right
|
|
* of displayed cursor!
|
|
*/
|
|
x += 64;
|
|
y += 64;
|
|
|
|
/* XXX CONSTANTS */
|
|
tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_X_LOW/*,
|
|
x & 0xff*/);
|
|
tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_X_HIGH/*,
|
|
(x >> 8) & 0x0f*/);
|
|
tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_Y_LOW/*,
|
|
y & 0xff*/);
|
|
tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_Y_HIGH/*,
|
|
(y >> 8) & 0x0f*/);
|
|
}
|
|
|
|
void
|
|
tga_bt485_get_cpos(dc, xp, yp)
|
|
struct tga_devconfig *dc;
|
|
int *xp, *yp;
|
|
{
|
|
u_int8_t regval;
|
|
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_COMMAND_2);
|
|
if ((regval & 0x03) == 0x00) { /* XXX */
|
|
*xp = *yp = TGA_CURSOR_OFF;
|
|
return;
|
|
}
|
|
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_X_LOW);
|
|
*xp = regval;
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_X_HIGH);
|
|
*xp |= regval << 8; /* XXX */
|
|
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_Y_LOW);
|
|
*yp = regval;
|
|
regval = tga_bt485_rd_reg(dc->dc_regs, BT485_REG_CURSOR_Y_HIGH);
|
|
*yp |= regval << 8; /* XXX */
|
|
|
|
/*
|
|
* RAMDAC cursors are 1-based, and position is bottom-right
|
|
* of displayed cursor!
|
|
*/
|
|
(*xp) -= 64;
|
|
(*yp) -= 64;
|
|
}
|
|
|
|
void
|
|
tga_console(pcf, pcfa, pmf, pmfa, ppf, ppfa, bus, device, function)
|
|
__const struct pci_conf_fns *pcf;
|
|
__const struct pci_mem_fns *pmf;
|
|
__const struct pci_pio_fns *ppf;
|
|
void *pcfa, *pmfa, *ppfa;
|
|
pci_bus_t bus;
|
|
pci_device_t device;
|
|
pci_function_t function;
|
|
{
|
|
struct tga_devconfig *dcp = &tga_console_dc;
|
|
|
|
tga_getdevconfig(pcf, pcfa, pmf, pmfa,
|
|
PCI_MAKE_TAG(bus, device, function), dcp);
|
|
|
|
/* sanity checks */
|
|
if (dcp->dc_vaddr == NULL)
|
|
panic("tga_console(%d, %d): couldn't map memory space",
|
|
device, function);
|
|
if (dcp->dc_tgaconf == NULL)
|
|
panic("tga_console(%d, %d): unknown board configuration",
|
|
device, function);
|
|
|
|
wsc_console(&dcp->dc_ansicons, &tga_acf, &dcp->dc_rcons,
|
|
dcp->dc_rcons.rc_maxrow, dcp->dc_rcons.rc_maxcol, 0, 0);
|
|
}
|