219 lines
6.7 KiB
C
219 lines
6.7 KiB
C
/* $NetBSD: pci_tseng.c,v 1.8 2005/12/11 12:17:00 christos Exp $ */
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/*
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* Copyright (c) 1999 Leo Weppelman. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Leo Weppelman.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.8 2005/12/11 12:17:00 christos Exp $");
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#include <sys/param.h>
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#include <sys/queue.h>
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#include <sys/systm.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <atari/pci/pci_vga.h>
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#include <atari/dev/grf_etreg.h>
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#define PCI_LINMEMBASE 0x0e000000
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#define PCI_IOBASE 0x800
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static void et6000_init(volatile u_char *, u_char *, int);
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/*
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* Use tables for the card init...
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*/
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static u_char seq_tab[] = {
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0x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4 };
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static u_char gfx_tab[] = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff };
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static u_char attr_tab[] = {
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0x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00 };
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static u_char crt_tab[] = {
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0x60, 0x53, 0x4f, 0x94, 0x56, 0x05, 0xc1, 0x1f,
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0x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x07, 0x80,
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0x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc2, 0xa3,
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0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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#ifdef ET4000_HAS_2MB_MEM
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0x00, 0x80, 0xa0, 0x00, 0x00, 0x10, 0x03, 0x89, /* 2 MB video memory */
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#else
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0x00, 0x80, 0x28, 0x00, 0x00, 0x10, 0x43, 0x09, /* 1 MB video memory */
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#endif
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
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static u_char ras_cas_tab[] = {
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0x11, 0x14, 0x15 };
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void
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tseng_init(pc, tag, id, ba, fb)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int id;
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volatile u_char *ba;
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u_char *fb;
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{
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int i, j, csr;
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int is_et6000 = 0;
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is_et6000 = (id == PCI_PRODUCT_TSENG_ET6000) ? 1 : 0;
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/* Turn on the card */
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pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
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if (is_et6000)
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pci_conf_write(pc, tag, PCI_MAPREG_START+4,
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PCI_IOBASE | PCI_MAPREG_TYPE_IO);
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
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csr |= PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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if (is_et6000) {
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/*
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* The et6[01]000 cards have MDRAM chips. The
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* timeing to those chips is not properly initialized
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* by the card on init. The way to determine the
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* values is not documented either :-( So that's why
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* all this mess below (and in et6000_init()....
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*/
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for (i = 0; i < sizeof(ras_cas_tab); i++) {
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et6000_init(ba, fb, i);
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for (j = 0; j < 32; j++)
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fb[j] = j;
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for (j = 0; j < 32; j++)
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if (fb[j] != j)
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break;
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if (j == 32)
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break;
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}
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}
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vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
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vgaw(ba, GREG_VIDEOSYSENABLE, 0x01);
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WCrt(ba, 0x17 , 0x00); /* color */
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WCrt(ba, 0x11 , 0x00); /* color */
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vgaw(ba, VDAC_MASK , 0xff);
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WSeq(ba, SEQ_ID_RESET , 0x00);
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vgaw(ba, GREG_HERCULESCOMPAT, 0x03);
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vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
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/* Load sequencer */
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for (i = 1; i < 8; i++)
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WSeq(ba, i, seq_tab[i]);
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WSeq(ba, SEQ_ID_RESET , 0x03);
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vgar(ba, VDAC_ADDRESS); /* clear old state */
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vgar(ba, VDAC_MASK);
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vgar(ba, VDAC_MASK);
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vgar(ba, VDAC_MASK);
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vgar(ba, VDAC_MASK);
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vgaw(ba, VDAC_MASK, 0); /* set to palette */
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vgar(ba, VDAC_ADDRESS); /* clear state */
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vgaw(ba, VDAC_MASK, 0xff);
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/*
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* Make sure we're allowed to write all crt-registers
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*/
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WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
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/* CRT registers */
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for (i = 0; i < 0x3e; i++)
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WCrt(ba, i, crt_tab[i]);
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/* GCT registers */
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for (i = 0; i < 0x09; i++)
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WGfx(ba, i, gfx_tab[i]);
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for (i = 0; i < 0x10; i++)
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WAttr(ba, i, i);
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for (; i < 0x18; i++)
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WAttr(ba, i, attr_tab[i - 0x10]);
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WAttr(ba, 0x20, 0);
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}
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/*
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* Initialize the et6000 specific (PCI) registers. Try to do it like the
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* video-bios would have done it, so things like Xservers get what they
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* expect. Most info was kindly provided by Koen Gadeyne.
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*/
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static void
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et6000_init(ba, fb, iter)
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volatile u_char *ba;
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u_char *fb;
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int iter;
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{
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int i;
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u_char dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63,
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0x28,0x22, 0x79,0x49, 0x6f,0x47,
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0x28,0x41, 0x6b,0x44, 0x00,0x00,
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0x00,0x00, 0x5d,0x25, 0x00,0x00,
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0x00,0x00, 0x00,0x96 };
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ba += 0x800;
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ba[0x40] = 0x06; /* Use standard vga addressing */
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ba[0x41] = 0x2a; /* Performance control */
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ba[0x43] = 0x02; /* XCLK/SCLK config */
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ba[0x44] = ras_cas_tab[iter]; /* RAS/CAS config */
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ba[0x46] = 0x00; /* CRT display feature */
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ba[0x47] = 0x10;
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ba[0x58] = 0x00; /* Video Control 1 */
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ba[0x59] = 0x04; /* Video Control 2 */
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/*
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* Setup a 'standard' CLKDAC
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*/
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ba[0x42] = 0x00; /* MCLK == CLK0 */
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ba[0x67] = 0x00; /* Start filling from dac-reg 0 and up... */
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for (i = 0; i < 0x16; i++)
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ba[0x69] = dac_tab[i];
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if (ba[8] == 0x70) { /* et6100, right? */
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volatile u_char *ma = (volatile u_char *)fb;
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u_char bv;
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/*
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* XXX Black magic to get the bloody MDRAM's to function...
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* XXX _Only_ tested on my card! [leo]
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*/
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bv = ba[45];
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ba[0x45] = bv | 0x40; /* Reset MDRAM's */
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ba[0x45] = bv | 0x70; /* Program latency value */
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ma[0x0] = 0; /* Yeah, right :-( */
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ba[0x45] = bv; /* Back to normal */
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}
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}
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