247 lines
6.2 KiB
C
247 lines
6.2 KiB
C
/* $NetBSD: pci_hades.c,v 1.3 2002/09/27 15:35:54 provos Exp $ */
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/*
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* Copyright (c) 1996 Leo Weppelman. All rights reserved.
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* Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <machine/cpu.h>
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#include <machine/iomap.h>
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#include <machine/mfp.h>
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#include <machine/bswap.h>
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#include <atari/atari/device.h>
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#include <atari/pci/pci_vga.h>
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#include <atari/dev/grf_etreg.h>
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int
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pci_bus_maxdevs(pc, busno)
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pci_chipset_tag_t pc;
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int busno;
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{
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return (4);
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}
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static int pci_config_offset __P((pcitag_t));
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/*
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* Atari_init.c maps the config areas NBPG bytes apart....
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*/
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static int pci_config_offset(tag)
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pcitag_t tag;
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{
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int device;
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device = (tag >> 11) & 0x1f;
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return(device * NBPG);
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}
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pcireg_t
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pci_conf_read(pc, tag, reg)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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{
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u_long data;
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data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
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return (bswap32(data));
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}
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void
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pci_conf_write(pc, tag, reg, data)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int reg;
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pcireg_t data;
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{
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*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
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= bswap32(data);
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}
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/*
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* The interrupt stuff is rather ugly. On the Hades, all interrupt lines
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* for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
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* (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
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* to the slot position.
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*/
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static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
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static int iifun __P((int, int));
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static int
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iifun(slot, sr)
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int slot;
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int sr;
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{
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pci_intr_info_t *iinfo_p;
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int s;
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iinfo_p = &iinfo[slot];
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/*
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* Disable the interrupts
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*/
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MFP2->mf_imrb &= ~iinfo_p->imask;
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if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
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/*
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* We're running at a too high priority now.
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*/
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add_sicallback((si_farg)iifun, (void*)slot, 0);
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}
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else {
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s = splx(iinfo_p->ipl);
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(void) (iinfo_p->ifunc)(iinfo_p->iarg);
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splx(s);
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/*
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* Re-enable interrupts after handling
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*/
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MFP2->mf_imrb |= iinfo_p->imask;
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}
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return 1;
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}
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void *
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pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
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pci_chipset_tag_t pc;
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pci_intr_handle_t ih;
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int level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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pci_intr_info_t *iinfo_p;
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struct intrhand *ihand;
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int slot;
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slot = ih;
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iinfo_p = &iinfo[slot];
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if (iinfo_p->ipl > 0)
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panic("pci_intr_establish: interrupt was already established");
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ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
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(hw_ifun_t)iifun, (void *)slot);
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if (ihand != NULL) {
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iinfo_p->ipl = level;
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iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
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iinfo_p->ifunc = ih_fun;
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iinfo_p->iarg = ih_arg;
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iinfo_p->ihand = ihand;
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/*
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* Enable (unmask) the interrupt
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*/
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MFP2->mf_imrb |= iinfo_p->imask;
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MFP2->mf_ierb |= iinfo_p->imask;
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return(iinfo_p);
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}
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return NULL;
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}
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void
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pci_intr_disestablish(pc, cookie)
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pci_chipset_tag_t pc;
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void *cookie;
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{
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pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
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if (iinfo->ipl < 0)
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panic("pci_intr_disestablish: interrupt was not established");
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MFP2->mf_imrb &= ~iinfo->imask;
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MFP2->mf_ierb &= ~iinfo->imask;
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(void) intr_disestablish(iinfo_p->ihand);
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iinfo_p->ipl = -1;
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}
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/*
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* XXX: Why are we repeating this everywhere! (Leo)
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*/
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#define PCI_LINMEMBASE 0x0e000000
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static u_char crt_tab[] = {
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0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
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0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
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0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
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0xff };
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static u_char seq_tab[] = {
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0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
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static u_char attr_tab[] = {
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0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
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static u_char gdc_tab[] = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
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void
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ati_vga_init(pc, tag, id, ba, fb)
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pci_chipset_tag_t pc;
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pcitag_t tag;
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int id;
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volatile u_char *ba;
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u_char *fb;
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{
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int i, csr;
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/* Turn on the card */
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pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
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csr |= PCI_COMMAND_MASTER_ENABLE;
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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/*
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* Make sure we're allowed to write all crt-registers and reload them.
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*/
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WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
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for (i = 0; i < 0x18; i++)
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WCrt(ba, i, crt_tab[i]);
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for (i = 0; i < 8; i++)
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WSeq(ba, i, seq_tab[i]);
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for (i = 0; i < 9; i++)
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WGfx(ba, i, gdc_tab[i]);
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for (i = 0x10; i < 0x18; i++)
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WAttr(ba, i, attr_tab[i - 0x10]);
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WAttr(ba, 0x20, 0);
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}
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