1282 lines
29 KiB
C
1282 lines
29 KiB
C
/* $NetBSD: hme.c,v 1.1 1999/06/27 12:26:32 pk Exp $ */
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/*-
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* Copyright (c) 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* HME Ethernet module driver.
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*/
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#define HMEDEBUG
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#include "opt_inet.h"
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#include "opt_ccitt.h"
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#include "opt_llc.h"
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#include "opt_ns.h"
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#include "bpfilter.h"
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#include "rnd.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <machine/bus.h>
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#include <dev/ic/hmereg.h>
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#include <dev/ic/hmevar.h>
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void hme_start __P((struct ifnet *));
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void hme_stop __P((struct hme_softc *));
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int hme_ioctl __P((struct ifnet *, u_long, caddr_t));
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void hme_watchdog __P((struct ifnet *));
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void hme_shutdown __P((void *));
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void hme_init __P((struct hme_softc *));
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void hme_meminit __P((struct hme_softc *));
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void hme_reset __P((struct hme_softc *));
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void hme_setladrf __P((struct hme_softc *));
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/* MII methods & callbacks */
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static int hme_mii_readreg __P((struct device *, int, int));
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static void hme_mii_writereg __P((struct device *, int, int, int));
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static void hme_mii_statchg __P((struct device *));
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int hme_mediachange __P((struct ifnet *));
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void hme_mediastatus __P((struct ifnet *, struct ifmediareq *));
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struct mbuf *hme_get __P((struct hme_softc *, int, int));
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int hme_put __P((struct hme_softc *, int, struct mbuf *));
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void hme_read __P((struct hme_softc *, int, int));
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int hme_eint __P((struct hme_softc *, u_int));
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int hme_rint __P((struct hme_softc *));
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int hme_tint __P((struct hme_softc *));
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static int ether_cmp __P((u_char *, u_char *));
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/* Default buffer copy routines */
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void hme_copytobuf_contig __P((struct hme_softc *, void *, int, int));
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void hme_copyfrombuf_contig __P((struct hme_softc *, void *, int, int));
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void hme_zerobuf_contig __P((struct hme_softc *, int, int));
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void
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hme_config(sc)
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struct hme_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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struct mii_data *mii = &sc->sc_mii;
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bus_dma_segment_t seg;
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bus_size_t size;
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int rseg, error;
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/*
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* HME common initialization.
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*
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* hme_softc fields that must be initialized by the front-end:
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*
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* the bus tag:
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* sc_bustag
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*
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* the dma bus tag:
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* sc_dmatag
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*
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* the bus handles:
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* sc_seb (Shared Ethernet Block registers)
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* sc_erx (Receiver Unit registers)
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* sc_etx (Transmitter Unit registers)
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* sc_mac (MAC registers)
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* sc_mif (Managment Interface registers)
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*
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* the maximum bus burst size:
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* sc_burst
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*
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* (notyet:DMA capable memory for the ring descriptors & packet buffers:
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* rb_membase, rb_dmabase)
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*
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* the local Ethernet address:
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* sc_enaddr
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*
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*/
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/* Make sure the chip is stopped. */
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hme_stop(sc);
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/*
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* Allocate descriptors and buffers
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* XXX - do all this differently.. and more configurably,
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* eg. use things as `dma_load_mbuf()' on transmit,
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* and a pool of `EXTMEM' mbufs (with buffers DMA-mapped
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* all the time) on the reveiver side.
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*/
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#define _HME_NDESC 32
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#define _HME_BUFSZ 32
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/* Note: the # of descriptors must be a multiple of 16 */
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sc->sc_rb.rb_ntbuf = _HME_NDESC;
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sc->sc_rb.rb_nrbuf = _HME_NDESC;
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/*
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* Allocate DMA capable memory
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* Buffer descriptors must be aligned on a 2048 byte boundary;
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* take this into account when calculating the size. Note that
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* the maximum number of descriptors (256) occupies 2048 bytes,
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* so we allocate that much regardless of _HME_NDESC.
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*/
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size = 2048 + /* TX descriptors */
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2048 + /* RX descriptors */
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sc->sc_rb.rb_ntbuf * _HME_BUFSZ + /* TX buffers */
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sc->sc_rb.rb_nrbuf * _HME_BUFSZ; /* TX buffers */
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if ((error = bus_dmamem_alloc(sc->sc_dmatag, size,
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2048, 0,
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&seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
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printf("%s: DMA buffer alloc error %d\n",
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sc->sc_dev.dv_xname, error);
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}
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sc->sc_rb.rb_dmabase = seg.ds_addr;
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/* Map DMA memory in CPU adressable space */
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if ((error = bus_dmamem_map(sc->sc_dmatag, &seg, rseg, size,
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&sc->sc_rb.rb_membase,
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BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
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printf("%s: DMA buffer map error %d\n",
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sc->sc_dev.dv_xname, error);
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bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
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return;
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}
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#if 0
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/*
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* Install default copy routines if not supplied.
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*/
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if (sc->sc_copytobuf == NULL)
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sc->sc_copytobuf = hme_copytobuf_contig;
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if (sc->sc_copyfrombuf == NULL)
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sc->sc_copyfrombuf = hme_copyfrombuf_contig;
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#endif
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/* Initialize ifnet structure. */
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bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
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ifp->if_softc = sc;
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ifp->if_start = hme_start;
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ifp->if_ioctl = hme_ioctl;
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ifp->if_watchdog = hme_watchdog;
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ifp->if_flags =
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IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
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/* Initialize ifmedia structures and MII info */
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mii->mii_ifp = ifp;
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mii->mii_readreg = hme_mii_readreg;
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mii->mii_writereg = hme_mii_writereg;
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mii->mii_statchg = hme_mii_statchg;
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ifmedia_init(&mii->mii_media, 0, hme_mediachange, hme_mediastatus);
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if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
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/* No PHY attached */
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ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
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ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
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} else {
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/*
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* XXX - we can really do the following ONLY if the
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* phy indeed has the auto negotiation capability!!
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*/
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ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
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}
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/* Attach the interface. */
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if_attach(ifp);
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ether_ifattach(ifp, sc->sc_enaddr);
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#if NBPFILTER > 0
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bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
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#endif
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printf(": address %s\n", ether_sprintf(sc->sc_enaddr));
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sc->sc_sh = shutdownhook_establish(hme_shutdown, sc);
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if (sc->sc_sh == NULL)
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panic("hme_config: can't establish shutdownhook");
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#if 0
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printf("%s: %d receive buffers, %d transmit buffers\n",
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sc->sc_dev.dv_xname, sc->sc_nrbuf, sc->sc_ntbuf);
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sc->sc_rbufaddr = malloc(sc->sc_nrbuf * sizeof(int), M_DEVBUF,
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M_WAITOK);
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sc->sc_tbufaddr = malloc(sc->sc_ntbuf * sizeof(int), M_DEVBUF,
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M_WAITOK);
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#endif
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#if NRND > 0
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rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
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RND_TYPE_NET, 0);
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#endif
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}
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void
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hme_reset(sc)
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struct hme_softc *sc;
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{
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int s;
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s = splnet();
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hme_init(sc);
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splx(s);
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}
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void
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hme_stop(sc)
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struct hme_softc *sc;
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{
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bus_space_tag_t t = sc->sc_bustag;
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bus_space_handle_t seb = sc->sc_seb;
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int n;
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/* Reset transmitter and receiver */
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bus_space_write_4(t, seb, HME_SEBI_RESET,
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(HME_SEB_RESET_ETX | HME_SEB_RESET_ERX));
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for (n = 0; n < 20; n++) {
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u_int32_t v = bus_space_read_4(t, seb, HME_SEBI_RESET);
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if ((v & (HME_SEB_RESET_ETX | HME_SEB_RESET_ERX)) == 0)
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return;
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DELAY(20);
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}
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printf("%s: hme_stop: reset failed\n", sc->sc_dev.dv_xname);
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}
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void
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hme_meminit(sc)
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struct hme_softc *sc;
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{
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bus_addr_t txbufdma, rxbufdma;
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bus_addr_t dma;
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caddr_t p;
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unsigned int ntbuf, nrbuf, i;
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struct hme_ring *hr = &sc->sc_rb;
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p = hr->rb_membase;
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dma = hr->rb_dmabase;
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ntbuf = hr->rb_ntbuf;
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nrbuf = hr->rb_nrbuf;
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/*
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* Allocate transmit descriptors
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*/
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hr->rb_txd = p;
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hr->rb_txddma = dma;
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p += ntbuf * HME_XD_SIZE;
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dma += ntbuf * HME_XD_SIZE;
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/*
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* Allocate receive descriptors
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* Buffer descriptors must be aligned on a 2048 byte boundary.
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*/
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dma = (bus_addr_t)roundup((long)dma, 2048);
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p = (caddr_t)roundup((long)p, 2048);
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hr->rb_rxd = p;
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hr->rb_rxddma = dma;
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p += nrbuf * HME_XD_SIZE;
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dma += nrbuf * HME_XD_SIZE;
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/*
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* Allocate transmit buffers
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*/
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hr->rb_txbuf = p;
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txbufdma = dma;
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p += ntbuf * _HME_BUFSZ;
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dma += ntbuf * _HME_BUFSZ;
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/*
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* Allocate receive buffers
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*/
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hr->rb_rxbuf = p;
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rxbufdma = dma;
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p += nrbuf * _HME_BUFSZ;
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dma += nrbuf * _HME_BUFSZ;
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/*
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* Initialize transmit buffer descriptors
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*/
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for (i = 0; i < ntbuf; i++) {
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HME_XD_SETADDR(hr->rb_txd, i, txbufdma + i * _HME_BUFSZ);
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HME_XD_SETFLAGS(hr->rb_txd, i, 0);
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}
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/*
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* Initialize receive buffer descriptors
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*/
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for (i = 0; i < nrbuf; i++) {
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HME_XD_SETADDR(hr->rb_txd, i, rxbufdma + i * _HME_BUFSZ);
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HME_XD_SETFLAGS(hr->rb_txd, i,
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HME_XD_OWN | HME_XD_ENCODE_RSIZE(_HME_BUFSZ));
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}
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hr->rb_tdhead = hr->rb_tdtail = 0;
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hr->rb_td_nbusy = 0;
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hr->rb_rdtail = 0;
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}
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/*
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* Initialization of interface; set up initialization block
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* and transmit/receive descriptor rings.
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*/
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void
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hme_init(sc)
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struct hme_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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bus_space_tag_t t = sc->sc_bustag;
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bus_space_handle_t seb = sc->sc_seb;
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bus_space_handle_t etx = sc->sc_etx;
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bus_space_handle_t erx = sc->sc_erx;
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bus_space_handle_t mac = sc->sc_mac;
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bus_space_handle_t mif = sc->sc_mif;
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u_int8_t *ea;
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u_int32_t v;
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/*
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* Initialization sequence. The numbered steps below correspond
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* to the sequence outlined in section 6.3.5.1 in the Ethernet
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* Channel Engine manual (part of the PCIO manual).
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* See also the STP2002-STQ document from Sun Microsystems.
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*/
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/* step 1 & 2. Reset the Ethernet Channel */
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hme_stop(sc);
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/* Call MI reset function if any */
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if (sc->sc_hwreset)
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(*sc->sc_hwreset)(sc);
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#if 0
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/* Mask all MIF interrupts, just in case */
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bus_space_write_4(t, mif, HME_MIFI_IMASK, 0xffff);
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#endif
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/* step 3. Setup data structures in host memory */
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hme_meminit(sc);
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/* step 4. TX MAC registers & counters */
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bus_space_write_4(t, mac, HME_MACI_NCCNT, 0);
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bus_space_write_4(t, mac, HME_MACI_FCCNT, 0);
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bus_space_write_4(t, mac, HME_MACI_EXCNT, 0);
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bus_space_write_4(t, mac, HME_MACI_LTCNT, 0);
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/* Load station MAC address */
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ea = sc->sc_enaddr;
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bus_space_write_4(t, mac, HME_MACI_MACADDR0, (ea[0] << 8) | ea[1]);
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bus_space_write_4(t, mac, HME_MACI_MACADDR1, (ea[2] << 8) | ea[3]);
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bus_space_write_4(t, mac, HME_MACI_MACADDR2, (ea[4] << 8) | ea[5]);
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/*
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* Init seed for backoff
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* (source suggested by manual: low 10 bits of MAC address)
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*/
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v = ((ea[4] << 8) | ea[5]) & 0x3fff;
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bus_space_write_4(t, mac, HME_MACI_RANDSEED, v);
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/* Note: Accepting power-on default for other MAC registers here.. */
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/* step 5. RX MAC registers & counters */
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hme_setladrf(sc);
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/* step 6 & 7. Program Descriptor Ring Base Addresses */
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bus_space_write_4(t, etx, HME_ETXI_RING, sc->sc_rb.rb_txddma);
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bus_space_write_4(t, etx, HME_ETXI_RSIZE, sc->sc_rb.rb_ntbuf);
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bus_space_write_4(t, erx, HME_ERXI_RING, sc->sc_rb.rb_rxddma);
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/* step 8. Global Configuration & Interrupt Mask */
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bus_space_write_4(t, seb, HME_SEBI_IMASK,
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HME_SEB_STAT_SENTFRAME | HME_SEB_STAT_TXPERR |
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HME_SEB_STAT_GOTFRAME | HME_SEB_STAT_RCNTEXP);
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switch (sc->sc_burst) {
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default:
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v = 0;
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break;
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case 16:
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v = HME_SEB_CFG_BURST16;
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break;
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case 32:
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v = HME_SEB_CFG_BURST32;
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break;
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case 64:
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|
v = HME_SEB_CFG_BURST64;
|
|
break;
|
|
}
|
|
bus_space_write_4(t, seb, HME_SEBI_CFG, v);
|
|
|
|
/* step 9. ETX Configuration: use mostly default values */
|
|
|
|
/* Enable DMA */
|
|
v = bus_space_read_4(t, erx, HME_ETXI_CFG);
|
|
v |= HME_ETX_CFG_DMAENABLE;
|
|
bus_space_write_4(t, erx, HME_ETXI_CFG, v);
|
|
|
|
/* Descriptor ring size: in increments of 16 */
|
|
bus_space_write_4(t, erx, HME_ETXI_RSIZE, _HME_NDESC / 16);
|
|
|
|
|
|
/* step 10. ERX Configuration: use default values; enable DMA */
|
|
v = bus_space_read_4(t, etx, HME_ERXI_CFG);
|
|
v |= HME_ERX_CFG_DMAENABLE;
|
|
bus_space_write_4(t, etx, HME_ERXI_CFG, v);
|
|
|
|
/* step 11. XIF Configuration */
|
|
v = bus_space_read_4(t, mac, HME_MACI_XIF);
|
|
v |= HME_MAC_XIF_OE;
|
|
bus_space_write_4(t, mac, HME_MACI_XIF, v);
|
|
|
|
/* step 12. RX_MAC Configuration Register */
|
|
v = bus_space_read_4(t, mac, HME_MACI_RXCFG);
|
|
v |= HME_MAC_RXCFG_ENABLE;
|
|
bus_space_write_4(t, mac, HME_MACI_RXCFG, v);
|
|
|
|
/* step 13. TX_MAC Configuration Register */
|
|
v = bus_space_read_4(t, mac, HME_MACI_TXCFG);
|
|
v |= HME_MAC_TXCFG_ENABLE;
|
|
bus_space_write_4(t, mac, HME_MACI_TXCFG, v);
|
|
|
|
/* step 14. Issue Transmit Pending command */
|
|
|
|
/*
|
|
* Put MIF in frame mode
|
|
* XXX - do bit-bang mode later
|
|
*/
|
|
v = bus_space_read_4(t, mif, HME_MIFI_CFG);
|
|
v &= ~HME_MIF_CFG_BBMODE;
|
|
bus_space_write_4(t, mif, HME_MIFI_CFG, v);
|
|
|
|
/* Call MI initialization function if any */
|
|
if (sc->sc_hwinit)
|
|
(*sc->sc_hwinit)(sc);
|
|
|
|
ifp->if_flags |= IFF_RUNNING;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_timer = 0;
|
|
hme_start(ifp);
|
|
}
|
|
|
|
/*
|
|
* Compare two Ether/802 addresses for equality, inlined and unrolled for
|
|
* speed.
|
|
*/
|
|
static __inline__ int
|
|
ether_cmp(a, b)
|
|
u_char *a, *b;
|
|
{
|
|
|
|
if (a[5] != b[5] || a[4] != b[4] || a[3] != b[3] ||
|
|
a[2] != b[2] || a[1] != b[1] || a[0] != b[0])
|
|
return (0);
|
|
return (1);
|
|
}
|
|
|
|
|
|
/*
|
|
* Routine to copy from mbuf chain to transmit buffer in
|
|
* network buffer memory.
|
|
* Returns the amount of data copied.
|
|
*/
|
|
int
|
|
hme_put(sc, ri, m)
|
|
struct hme_softc *sc;
|
|
int ri; /* Ring index */
|
|
struct mbuf *m;
|
|
{
|
|
struct mbuf *n;
|
|
int len, tlen = 0;
|
|
caddr_t bp;
|
|
|
|
bp = sc->sc_rb.rb_txbuf + (ri % sc->sc_rb.rb_ntbuf) * _HME_BUFSZ;
|
|
for (; m; m = n) {
|
|
len = m->m_len;
|
|
if (len == 0) {
|
|
MFREE(m, n);
|
|
continue;
|
|
}
|
|
bcopy(mtod(m, caddr_t), bp, len);
|
|
bp += len;
|
|
tlen += len;
|
|
MFREE(m, n);
|
|
}
|
|
return (tlen);
|
|
}
|
|
|
|
/*
|
|
* Pull data off an interface.
|
|
* Len is length of data, with local net header stripped.
|
|
* We copy the data into mbufs. When full cluster sized units are present
|
|
* we copy into clusters.
|
|
*/
|
|
struct mbuf *
|
|
hme_get(sc, ri, totlen)
|
|
struct hme_softc *sc;
|
|
int ri, totlen;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
struct mbuf *m, *m0, *newm;
|
|
caddr_t bp;
|
|
int len;
|
|
|
|
MGETHDR(m0, M_DONTWAIT, MT_DATA);
|
|
if (m0 == 0)
|
|
return (0);
|
|
m0->m_pkthdr.rcvif = ifp;
|
|
m0->m_pkthdr.len = totlen;
|
|
len = MHLEN;
|
|
m = m0;
|
|
|
|
bp = sc->sc_rb.rb_rxbuf + (ri % sc->sc_rb.rb_nrbuf) * _HME_BUFSZ;
|
|
|
|
while (totlen > 0) {
|
|
if (totlen >= MINCLSIZE) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if ((m->m_flags & M_EXT) == 0)
|
|
goto bad;
|
|
len = MCLBYTES;
|
|
}
|
|
|
|
if (m == m0) {
|
|
caddr_t newdata = (caddr_t)
|
|
ALIGN(m->m_data + sizeof(struct ether_header)) -
|
|
sizeof(struct ether_header);
|
|
len -= newdata - m->m_data;
|
|
m->m_data = newdata;
|
|
}
|
|
|
|
m->m_len = len = min(totlen, len);
|
|
bcopy(bp, mtod(m, caddr_t), len);
|
|
bp += len;
|
|
|
|
totlen -= len;
|
|
if (totlen > 0) {
|
|
MGET(newm, M_DONTWAIT, MT_DATA);
|
|
if (newm == 0)
|
|
goto bad;
|
|
len = MLEN;
|
|
m = m->m_next = newm;
|
|
}
|
|
}
|
|
|
|
return (m0);
|
|
|
|
bad:
|
|
m_freem(m0);
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Pass a packet to the higher levels.
|
|
*/
|
|
void
|
|
hme_read(sc, ix, len)
|
|
struct hme_softc *sc;
|
|
int ix, len;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
struct mbuf *m;
|
|
struct ether_header *eh;
|
|
|
|
if (len <= sizeof(struct ether_header) ||
|
|
len > ETHERMTU + sizeof(struct ether_header)) {
|
|
#ifdef HMEDEBUG
|
|
printf("%s: invalid packet size %d; dropping\n",
|
|
sc->sc_dev.dv_xname, len);
|
|
#endif
|
|
ifp->if_ierrors++;
|
|
return;
|
|
}
|
|
|
|
/* Pull packet off interface. */
|
|
m = hme_get(sc, ix, len);
|
|
if (m == 0) {
|
|
ifp->if_ierrors++;
|
|
return;
|
|
}
|
|
|
|
ifp->if_ipackets++;
|
|
|
|
/* We assume that the header fit entirely in one mbuf. */
|
|
eh = mtod(m, struct ether_header *);
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* Check if there's a BPF listener on this interface.
|
|
* If so, hand off the raw packet to BPF.
|
|
*/
|
|
if (ifp->if_bpf) {
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
|
|
/*
|
|
* Note that the interface cannot be in promiscuous mode if
|
|
* there are no BPF listeners. And if we are in promiscuous
|
|
* mode, we have to check if this packet is really ours.
|
|
*/
|
|
if ((ifp->if_flags & IFF_PROMISC) != 0 &&
|
|
(eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
|
|
ether_cmp(eh->ether_dhost, sc->sc_enaddr)) {
|
|
m_freem(m);
|
|
return;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* Pass the packet up. */
|
|
(*ifp->if_input)(ifp, m);
|
|
}
|
|
|
|
void
|
|
hme_start(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct hme_softc *sc = (struct hme_softc *)ifp->if_softc;
|
|
caddr_t txd = sc->sc_rb.rb_txd;
|
|
struct mbuf *m;
|
|
unsigned int ri, len;
|
|
unsigned int ntbuf = sc->sc_rb.rb_ntbuf;
|
|
|
|
if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
|
|
return;
|
|
|
|
ri = sc->sc_rb.rb_tdhead;
|
|
|
|
for (;;) {
|
|
IF_DEQUEUE(&ifp->if_snd, m);
|
|
if (m == 0)
|
|
break;
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* If BPF is listening on this interface, let it see the
|
|
* packet before we commit it to the wire.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
#endif
|
|
|
|
/*
|
|
* Copy the mbuf chain into the transmit buffer.
|
|
*/
|
|
len = hme_put(sc, ri, m);
|
|
|
|
/*
|
|
* Initialize transmit registers and start transmission
|
|
*/
|
|
HME_XD_SETFLAGS(txd, ri,
|
|
HME_XD_OWN | HME_XD_SOP | HME_XD_EOP |
|
|
HME_XD_ENCODE_TSIZE(len));
|
|
|
|
bus_space_write_4(sc->sc_bustag, sc->sc_etx, HME_ETXI_PENDING,
|
|
HME_ETX_TP_DMAWAKEUP);
|
|
|
|
if (++ri == ntbuf)
|
|
ri = 0;
|
|
|
|
if (++sc->sc_rb.rb_td_nbusy == ntbuf) {
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
break;
|
|
}
|
|
}
|
|
|
|
sc->sc_rb.rb_tdhead = ri;
|
|
}
|
|
|
|
/*
|
|
* Transmit interrupt.
|
|
*/
|
|
int
|
|
hme_tint(sc)
|
|
struct hme_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t mac = sc->sc_mac;
|
|
unsigned int ri, txflags;
|
|
|
|
/*
|
|
* Unload collision counters
|
|
*/
|
|
ifp->if_collisions +=
|
|
bus_space_read_4(t, mac, HME_MACI_NCCNT) +
|
|
bus_space_read_4(t, mac, HME_MACI_FCCNT) +
|
|
bus_space_read_4(t, mac, HME_MACI_EXCNT) +
|
|
bus_space_read_4(t, mac, HME_MACI_LTCNT);
|
|
|
|
/*
|
|
* then clear the hardware counters.
|
|
*/
|
|
bus_space_write_4(t, mac, HME_MACI_NCCNT, 0);
|
|
bus_space_write_4(t, mac, HME_MACI_FCCNT, 0);
|
|
bus_space_write_4(t, mac, HME_MACI_EXCNT, 0);
|
|
bus_space_write_4(t, mac, HME_MACI_LTCNT, 0);
|
|
|
|
/* Fetch current position in the transmit ring */
|
|
ri = sc->sc_rb.rb_tdtail;
|
|
|
|
for (;;) {
|
|
if (sc->sc_rb.rb_td_nbusy <= 0)
|
|
break;
|
|
|
|
txflags = HME_XD_GETFLAGS(sc->sc_rb.rb_txd, ri);
|
|
|
|
if (txflags & HME_XD_OWN)
|
|
break;
|
|
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
ifp->if_opackets++;
|
|
|
|
if (++ri == sc->sc_rb.rb_nrbuf)
|
|
ri = 0;
|
|
|
|
--sc->sc_rb.rb_td_nbusy;
|
|
}
|
|
|
|
sc->sc_rb.rb_tdtail = ri;
|
|
|
|
hme_start(ifp);
|
|
|
|
if (sc->sc_rb.rb_td_nbusy == 0)
|
|
ifp->if_timer = 0;
|
|
|
|
return (1);
|
|
}
|
|
|
|
/*
|
|
* Receive interrupt.
|
|
*/
|
|
int
|
|
hme_rint(sc)
|
|
struct hme_softc *sc;
|
|
{
|
|
caddr_t xdr = sc->sc_rb.rb_rxd;
|
|
unsigned int nrbuf = sc->sc_rb.rb_nrbuf;
|
|
unsigned int ri, len;
|
|
u_int32_t flags;
|
|
|
|
ri = sc->sc_rb.rb_rdtail;
|
|
|
|
/*
|
|
* Process all buffers with valid data.
|
|
*/
|
|
for (;;) {
|
|
flags = HME_XD_GETFLAGS(xdr, ri);
|
|
if (flags & HME_XD_OWN)
|
|
break;
|
|
|
|
len = HME_XD_DECODE_RSIZE(flags);
|
|
hme_read(sc, ri, len);
|
|
|
|
/* This buffer can be used by the hardware again */
|
|
HME_XD_SETFLAGS(xdr, ri,
|
|
HME_XD_OWN | HME_XD_ENCODE_RSIZE(_HME_BUFSZ));
|
|
|
|
if (++ri == nrbuf)
|
|
ri = 0;
|
|
}
|
|
|
|
sc->sc_rb.rb_rdtail = ri;
|
|
|
|
return (1);
|
|
}
|
|
|
|
int
|
|
hme_eint(sc, status)
|
|
struct hme_softc *sc;
|
|
u_int status;
|
|
{
|
|
char bits[128];
|
|
|
|
if ((status & HME_SEB_STAT_MIFIRQ) != 0) {
|
|
printf("%s: XXXlink status changed\n", sc->sc_dev.dv_xname);
|
|
return (1);
|
|
}
|
|
|
|
printf("%s: status=%s\n", sc->sc_dev.dv_xname,
|
|
bitmask_snprintf(status, HME_SEB_STAT_BITS, bits,sizeof(bits)));
|
|
return (1);
|
|
}
|
|
|
|
int
|
|
hme_intr(v)
|
|
void *v;
|
|
{
|
|
struct hme_softc *sc = (struct hme_softc *)v;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t seb = sc->sc_seb;
|
|
u_int32_t status;
|
|
int r = 0;
|
|
|
|
status = bus_space_read_4(t, seb, HME_SEBI_STAT);
|
|
|
|
if ((status & HME_SEB_STAT_ALL_ERRORS) != 0)
|
|
r |= hme_eint(sc, status);
|
|
|
|
if ((status & (HME_SEB_STAT_TXALL | HME_SEB_STAT_HOSTTOTX)) != 0)
|
|
r |= hme_tint(sc);
|
|
|
|
if ((status & HME_SEB_STAT_RXTOHOST) != 0)
|
|
r |= hme_rint(sc);
|
|
|
|
return (r);
|
|
}
|
|
|
|
|
|
void
|
|
hme_watchdog(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct hme_softc *sc = ifp->if_softc;
|
|
|
|
log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
|
|
++ifp->if_oerrors;
|
|
|
|
hme_reset(sc);
|
|
}
|
|
|
|
/*
|
|
* MII interface
|
|
*/
|
|
static int
|
|
hme_mii_readreg(self, phy, reg)
|
|
struct device *self;
|
|
int phy, reg;
|
|
{
|
|
struct hme_softc *sc = (void *)self;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t mif = sc->sc_mif;
|
|
int n;
|
|
u_int32_t v;
|
|
|
|
/* Construct the frame command */
|
|
v = (MII_COMMAND_START << HME_MIF_FO_ST_SHIFT) |
|
|
HME_MIF_FO_TAMSB |
|
|
(MII_COMMAND_READ << HME_MIF_FO_OPC_SHIFT) |
|
|
(phy << HME_MIF_FO_PHYAD_SHIFT) |
|
|
(reg << HME_MIF_FO_REGAD_SHIFT);
|
|
|
|
bus_space_write_4(t, mif, HME_MIFI_FO, v);
|
|
for (n = 0; n < 100; n++) {
|
|
v = bus_space_read_4(t, mif, HME_MIFI_FO);
|
|
if (v & HME_MIF_FO_TALSB)
|
|
return (v & HME_MIF_FO_DATA);
|
|
}
|
|
|
|
printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
hme_mii_writereg(self, phy, reg, val)
|
|
struct device *self;
|
|
int phy, reg, val;
|
|
{
|
|
struct hme_softc *sc = (void *)self;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t mif = sc->sc_mif;
|
|
int n;
|
|
u_int32_t v;
|
|
|
|
/* Construct the frame command */
|
|
v = (MII_COMMAND_START << HME_MIF_FO_ST_SHIFT) |
|
|
HME_MIF_FO_TAMSB |
|
|
(MII_COMMAND_WRITE << HME_MIF_FO_OPC_SHIFT) |
|
|
(phy << HME_MIF_FO_PHYAD_SHIFT) |
|
|
(reg << HME_MIF_FO_REGAD_SHIFT) |
|
|
(val & HME_MIF_FO_DATA);
|
|
|
|
bus_space_write_4(t, mif, HME_MIFI_FO, v);
|
|
for (n = 0; n < 100; n++) {
|
|
v = bus_space_read_4(t, mif, HME_MIFI_FO);
|
|
if (v & HME_MIF_FO_TALSB)
|
|
return;
|
|
}
|
|
|
|
printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
|
|
}
|
|
|
|
static void
|
|
hme_mii_statchg(dev)
|
|
struct device *dev;
|
|
{
|
|
}
|
|
|
|
int
|
|
hme_mediachange(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct hme_softc *sc = ifp->if_softc;
|
|
struct ifmedia *ifm = &sc->sc_media;
|
|
int newmedia = ifm->ifm_media;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t mac = sc->sc_mac;
|
|
u_int32_t v;
|
|
int error;
|
|
|
|
if (IFM_TYPE(newmedia) != IFM_ETHER)
|
|
return (EINVAL);
|
|
|
|
if ((ifp->if_flags & IFF_UP) == 0)
|
|
return (0);
|
|
|
|
if ((error = mii_mediachg(&sc->sc_mii)) != 0)
|
|
return (error);
|
|
|
|
v = bus_space_read_4(t, mac, HME_MACI_TXCFG);
|
|
if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
|
|
v |= HME_MAC_TXCFG_FULLDPLX;
|
|
else
|
|
v &= ~HME_MAC_TXCFG_FULLDPLX;
|
|
bus_space_write_4(t, mac, HME_MACI_TXCFG, v);
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
hme_mediastatus(ifp, ifmr)
|
|
struct ifnet *ifp;
|
|
struct ifmediareq *ifmr;
|
|
{
|
|
struct hme_softc *sc = ifp->if_softc;
|
|
|
|
if ((ifp->if_flags & IFF_UP) == 0)
|
|
return;
|
|
|
|
mii_pollstat(&sc->sc_mii);
|
|
ifmr->ifm_active = sc->sc_mii.mii_media_active;
|
|
ifmr->ifm_status = sc->sc_mii.mii_media_status;
|
|
}
|
|
|
|
/*
|
|
* Process an ioctl request.
|
|
*/
|
|
int
|
|
hme_ioctl(ifp, cmd, data)
|
|
struct ifnet *ifp;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
{
|
|
struct hme_softc *sc = ifp->if_softc;
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s, error = 0;
|
|
|
|
s = splnet();
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
hme_init(sc);
|
|
arp_ifinit(ifp, ifa);
|
|
break;
|
|
#endif
|
|
#ifdef NS
|
|
case AF_NS:
|
|
{
|
|
struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
|
|
|
|
if (ns_nullhost(*ina))
|
|
ina->x_host =
|
|
*(union ns_host *)LLADDR(ifp->if_sadl);
|
|
else {
|
|
bcopy(ina->x_host.c_host,
|
|
LLADDR(ifp->if_sadl),
|
|
sizeof(sc->sc_enaddr));
|
|
}
|
|
/* Set new address. */
|
|
hme_init(sc);
|
|
break;
|
|
}
|
|
#endif
|
|
default:
|
|
hme_init(sc);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) != 0) {
|
|
/*
|
|
* If interface is marked down and it is running, then
|
|
* stop it.
|
|
*/
|
|
hme_stop(sc);
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) == 0) {
|
|
/*
|
|
* If interface is marked up and it is stopped, then
|
|
* start it.
|
|
*/
|
|
hme_init(sc);
|
|
} else if ((ifp->if_flags & IFF_UP) != 0) {
|
|
/*
|
|
* Reset the interface to pick up changes in any other
|
|
* flags that affect hardware registers.
|
|
*/
|
|
/*hme_stop(sc);*/
|
|
hme_init(sc);
|
|
}
|
|
#ifdef HMEDEBUG
|
|
sc->sc_debug = (ifp->if_flags & IFF_DEBUG) != 0 ? 1 : 0;
|
|
#endif
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ethercom) :
|
|
ether_delmulti(ifr, &sc->sc_ethercom);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
hme_setladrf(sc);
|
|
error = 0;
|
|
}
|
|
break;
|
|
|
|
case SIOCGIFMEDIA:
|
|
case SIOCSIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
|
|
break;
|
|
|
|
default:
|
|
error = EINVAL;
|
|
break;
|
|
}
|
|
|
|
splx(s);
|
|
return (error);
|
|
}
|
|
|
|
void
|
|
hme_shutdown(arg)
|
|
void *arg;
|
|
{
|
|
|
|
hme_stop((struct hme_softc *)arg);
|
|
}
|
|
|
|
/*
|
|
* Set up the logical address filter.
|
|
*/
|
|
void
|
|
hme_setladrf(sc)
|
|
struct hme_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
|
|
struct ether_multi *enm;
|
|
struct ether_multistep step;
|
|
struct ethercom *ec = &sc->sc_ethercom;
|
|
bus_space_tag_t t = sc->sc_bustag;
|
|
bus_space_handle_t mac = sc->sc_mac;
|
|
u_char *cp;
|
|
u_int32_t crc;
|
|
u_int32_t hash[4];
|
|
int len;
|
|
|
|
/*
|
|
* Set up multicast address filter by passing all multicast addresses
|
|
* through a crc generator, and then using the high order 6 bits as an
|
|
* index into the 64 bit logical address filter. The high order bit
|
|
* selects the word, while the rest of the bits select the bit within
|
|
* the word.
|
|
*/
|
|
|
|
if ((ifp->if_flags & IFF_PROMISC) != 0) {
|
|
u_int32_t v = bus_space_read_4(t, mac, HME_MACI_RXCFG);
|
|
v |= HME_MAC_RXCFG_PMISC;
|
|
bus_space_write_4(t, mac, HME_MACI_RXCFG, v);
|
|
goto allmulti;
|
|
}
|
|
|
|
/* Clear hash table */
|
|
hash[3] = hash[2] = hash[1] = hash[0] = 0;
|
|
ETHER_FIRST_MULTI(step, ec, enm);
|
|
while (enm != NULL) {
|
|
if (ether_cmp(enm->enm_addrlo, enm->enm_addrhi)) {
|
|
/*
|
|
* We must listen to a range of multicast addresses.
|
|
* For now, just accept all multicasts, rather than
|
|
* trying to set only those filter bits needed to match
|
|
* the range. (At this time, the only use of address
|
|
* ranges is for IP multicast routing, for which the
|
|
* range is big enough to require all bits set.)
|
|
*/
|
|
goto allmulti;
|
|
}
|
|
|
|
cp = enm->enm_addrlo;
|
|
crc = 0xffffffff;
|
|
for (len = sizeof(enm->enm_addrlo); --len >= 0;) {
|
|
int octet = *cp++;
|
|
int i;
|
|
|
|
#define MC_POLY_LE 0xedb88320UL /* mcast crc, little endian */
|
|
for (i = 0; i < 8; i++) {
|
|
if ((crc & 1) ^ (octet & 1)) {
|
|
crc >>= 1;
|
|
crc ^= MC_POLY_LE;
|
|
} else {
|
|
crc >>= 1;
|
|
}
|
|
octet >>= 1;
|
|
}
|
|
}
|
|
/* Just want the 6 most significant bits. */
|
|
crc >>= 26;
|
|
|
|
/* Set the corresponding bit in the filter. */
|
|
hash[crc >> 4] |= 1 << (crc & 0xf);
|
|
|
|
ETHER_NEXT_MULTI(step, enm);
|
|
}
|
|
|
|
/* Now load the hash table onto the chip */
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB0, hash[0]);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB1, hash[1]);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB2, hash[2]);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB3, hash[3]);
|
|
|
|
ifp->if_flags &= ~IFF_ALLMULTI;
|
|
return;
|
|
|
|
allmulti:
|
|
ifp->if_flags |= IFF_ALLMULTI;
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB0, 0xffff);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB1, 0xffff);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB2, 0xffff);
|
|
bus_space_write_4(t, mac, HME_MACI_HASHTAB3, 0xffff);
|
|
}
|
|
|
|
/*
|
|
* Routines for accessing the transmit and receive buffers.
|
|
* The various CPU and adapter configurations supported by this
|
|
* driver require three different access methods for buffers
|
|
* and descriptors:
|
|
* (1) contig (contiguous data; no padding),
|
|
* (2) gap2 (two bytes of data followed by two bytes of padding),
|
|
* (3) gap16 (16 bytes of data followed by 16 bytes of padding).
|
|
*/
|
|
|
|
#if 0
|
|
/*
|
|
* contig: contiguous data with no padding.
|
|
*
|
|
* Buffers may have any alignment.
|
|
*/
|
|
|
|
void
|
|
hme_copytobuf_contig(sc, from, ri, len)
|
|
struct hme_softc *sc;
|
|
void *from;
|
|
int ri, len;
|
|
{
|
|
volatile caddr_t buf = sc->sc_rb.rb_txbuf + (ri * _HME_BUFSZ);
|
|
|
|
/*
|
|
* Just call bcopy() to do the work.
|
|
*/
|
|
bcopy(from, buf, len);
|
|
}
|
|
|
|
void
|
|
hme_copyfrombuf_contig(sc, to, boff, len)
|
|
struct hme_softc *sc;
|
|
void *to;
|
|
int boff, len;
|
|
{
|
|
volatile caddr_t buf = sc->sc_rb.rb_rxbuf + (ri * _HME_BUFSZ);
|
|
|
|
/*
|
|
* Just call bcopy() to do the work.
|
|
*/
|
|
bcopy(buf, to, len);
|
|
}
|
|
#endif
|