187 lines
6.4 KiB
C
187 lines
6.4 KiB
C
/* $NetBSD: bus.h,v 1.5 2000/01/23 21:01:56 soda Exp $ */
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/* $OpenBSD: bus.h,v 1.13 1997/04/19 17:19:56 pefo Exp $ */
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/*
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* Copyright (c) 1997 Per Fogelstrom. All rights reserved.
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* Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARC_BUS_H_
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#define _ARC_BUS_H_
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#include <mips/locore.h>
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#include <machine/pio.h>
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#ifdef __STDC__
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#define CAT(a,b) a##b
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#define CAT3(a,b,c) a##b##c
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#else
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#define CAT(a,b) a/**/b
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#define CAT3(a,b,c) a/**/b/**/c
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#endif
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/*
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* Bus access types.
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*/
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typedef u_int32_t bus_addr_t;
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typedef u_int32_t bus_size_t;
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typedef u_int32_t bus_space_handle_t;
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typedef struct arc_bus_space *bus_space_tag_t;
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#if 1 /* XXX - <dev/isa/isavar.h> requires these types, not actually defined */
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typedef int bus_dma_tag_t;
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typedef int bus_dmamap_t;
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#endif
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struct arc_bus_space {
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u_int32_t bus_base;
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u_int8_t bus_sparse1; /* Sparse addressing shift count */
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u_int8_t bus_sparse2; /* Sparse addressing shift count */
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u_int8_t bus_sparse4; /* Sparse addressing shift count */
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u_int8_t bus_sparse8; /* Sparse addressing shift count */
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};
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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extern struct arc_bus_space arc_bus_io, arc_bus_mem;
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/*
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* Access methods for bus resources
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*/
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#define bus_space_map(t, addr, size, cacheable, bshp) \
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((*(bshp) = (t)->bus_base + (addr)), 0)
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#define bus_space_subregion(t, bsh, offset, size, nbshp) \
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((*(nbshp) = (bsh) + (offset)), 0)
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#define bus_space_unmap(t, bsh, size)
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#define bus_space_read(n,m) \
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static __inline CAT3(u_int,m,_t) \
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CAT(bus_space_read_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
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bus_addr_t ba) \
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{ \
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return *(volatile CAT3(u_int,m,_t) *)(bsh + ((ba) << CAT(bst->bus_sparse,n))); \
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}
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bus_space_read(1,8)
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bus_space_read(2,16)
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bus_space_read(4,32)
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#define bus_space_read_8 !!! bus_space_read_8 unimplemented !!!
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#define bus_space_read_multi_1(t, h, o, a, c) do { \
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insb((u_int8_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_2(t, h, o, a, c) do { \
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insw((u_int16_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_4(t, h, o, a, c) do { \
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insl((u_int32_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 not implemented !!!
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#define bus_space_write(n,m) \
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static __inline void \
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CAT(bus_space_write_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
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bus_addr_t ba, CAT3(u_int,m,_t) x) \
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{ \
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*(volatile CAT3(u_int,m,_t) *)(bsh + ((ba) << CAT(bst->bus_sparse,n))) = x; \
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}
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bus_space_write(1,8)
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bus_space_write(2,16)
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bus_space_write(4,32)
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#define bus_space_write_8 !!! bus_space_write_8 unimplemented !!!
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#define bus_space_write_multi_1(t, h, o, a, c) do { \
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outsb((u_int8_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_2(t, h, o, a, c) do { \
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outsw((u_int16_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_4(t, h, o, a, c) do { \
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outsl((u_int32_t *)((h) + (o)), (a), (c)); \
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} while(0)
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#define bus_space_write_multi_8 !!! bus_space_write_multi_8 not implemented !!!
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/* These are OpenBSD extensions to the general NetBSD bus interface. */
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#define bus_space_read_raw_multi(n,m,l) \
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static __inline void \
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CAT(bus_space_read_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
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bus_addr_t ba, u_int8_t *buf, bus_size_t cnt) \
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{ \
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CAT(bus_space_read_multi_,n)(bst, bsh, ba, (CAT3(u_int,m,_t) *)buf, \
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cnt >> l); \
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}
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bus_space_read_raw_multi(2,16,1)
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bus_space_read_raw_multi(4,32,2)
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#define bus_space_read_raw_multi_8 \
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!!! bus_space_read_raw_multi_8 not implemented !!!
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#define bus_space_write_raw_multi(n,m,l) \
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static __inline void \
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CAT(bus_space_write_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,\
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bus_addr_t ba, const u_int8_t *buf, bus_size_t cnt) \
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{ \
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CAT(bus_space_write_multi_,n)(bst, bsh, ba, \
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(const CAT3(u_int,m,_t) *)buf, cnt >> l); \
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}
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bus_space_write_raw_multi(2,16,1)
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bus_space_write_raw_multi(4,32,2)
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#define bus_space_write_raw_multi_8 \
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!!! bus_space_write_raw_multi_8 not implemented !!!
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/*
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* Bus read/write barrier methods.
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*
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* void bus_space_barrier __P((bus_space_tag_t tag,
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* bus_space_handle_t bsh, bus_size_t offset,
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* bus_size_t len, int flags));
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*
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* On the MIPS, we just flush the write buffer.
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*/
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#define bus_space_barrier(t, h, o, l, f) \
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((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)), \
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wbflush())
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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#endif /* _ARC_BUS_H_ */
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