293 lines
7.7 KiB
C
293 lines
7.7 KiB
C
/* $NetBSD: pci.c,v 1.23 1996/10/13 01:38:28 christos Exp $ */
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/*
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* Copyright (c) 1995, 1996 Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI bus autoconfiguration.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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int pcimatch __P((struct device *, void *, void *));
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void pciattach __P((struct device *, struct device *, void *));
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struct cfattach pci_ca = {
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sizeof(struct device), pcimatch, pciattach
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};
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struct cfdriver pci_cd = {
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NULL, "pci", DV_DULL
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};
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int pciprint __P((void *, const char *));
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int pcisubmatch __P((struct device *, void *, void *));
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int
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pcimatch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct pcibus_attach_args *pba = aux;
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if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
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return (0);
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/* Check the locators */
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if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
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cf->pcibuscf_bus != pba->pba_bus)
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return (0);
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/* sanity */
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if (pba->pba_bus < 0 || pba->pba_bus > 255)
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return (0);
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/*
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* XXX check other (hardware?) indicators
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*/
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return 1;
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}
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void
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pciattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pcibus_attach_args *pba = aux;
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bus_chipset_tag_t bc;
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pci_chipset_tag_t pc;
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int bus, device, maxndevs, function, nfunctions;
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pci_attach_hook(parent, self, pba);
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printf("\n");
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bc = pba->pba_bc;
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pc = pba->pba_pc;
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bus = pba->pba_bus;
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maxndevs = pci_bus_maxdevs(pc, bus);
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for (device = 0; device < maxndevs; device++) {
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pcitag_t tag;
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pcireg_t id, class, intr, bhlcr;
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struct pci_attach_args pa;
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int pin;
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tag = pci_make_tag(pc, bus, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
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nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
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for (function = 0; function < nfunctions; function++) {
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tag = pci_make_tag(pc, bus, device, function);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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pa.pa_bc = bc;
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pa.pa_pc = pc;
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pa.pa_device = device;
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pa.pa_function = function;
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pa.pa_tag = tag;
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pa.pa_id = id;
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pa.pa_class = class;
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if (bus == 0) {
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pa.pa_intrswiz = 0;
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pa.pa_intrtag = tag;
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} else {
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pa.pa_intrswiz = pba->pba_intrswiz + device;
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pa.pa_intrtag = pba->pba_intrtag;
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}
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pin = PCI_INTERRUPT_PIN(intr);
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if (pin == PCI_INTERRUPT_PIN_NONE) {
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/* no interrupt */
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pa.pa_intrpin = 0;
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} else {
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/*
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* swizzle it based on the number of
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* busses we're behind and our device
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* number.
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*/
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pa.pa_intrpin = /* XXX */
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((pin + pa.pa_intrswiz - 1) % 4) + 1;
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}
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pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
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config_found_sm(self, &pa, pciprint, pcisubmatch);
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}
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}
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}
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int
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pciprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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register struct pci_attach_args *pa = aux;
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char devinfo[256];
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if (pnp) {
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pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
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printf("%s at %s", devinfo, pnp);
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}
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printf(" dev %d function %d", pa->pa_device, pa->pa_function);
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return (UNCONF);
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}
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int
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pcisubmatch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct pci_attach_args *pa = aux;
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if (cf->pcicf_dev != PCI_UNK_DEV &&
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cf->pcicf_dev != pa->pa_device)
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return 0;
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if (cf->pcicf_function != PCI_UNK_FUNCTION &&
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cf->pcicf_function != pa->pa_function)
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return 0;
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return ((*cf->cf_attach->ca_match)(parent, match, aux));
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}
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int
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pci_io_find(pc, pcitag, reg, iobasep, iosizep)
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pci_chipset_tag_t pc;
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pcitag_t pcitag;
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int reg;
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bus_io_addr_t *iobasep;
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bus_io_size_t *iosizep;
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{
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pcireg_t addrdata, sizedata;
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int s;
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if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
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panic("pci_io_find: bad request");
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/* XXX?
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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addrdata = pci_conf_read(pc, pcitag, reg);
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s = splhigh();
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pci_conf_write(pc, pcitag, reg, 0xffffffff);
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sizedata = pci_conf_read(pc, pcitag, reg);
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pci_conf_write(pc, pcitag, reg, addrdata);
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splx(s);
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if (PCI_MAPREG_TYPE(addrdata) != PCI_MAPREG_TYPE_IO)
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panic("pci_io_find: not an I/O region");
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if (iobasep != NULL)
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*iobasep = PCI_MAPREG_IO_ADDR(addrdata);
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if (iosizep != NULL)
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*iosizep = PCI_MAPREG_IO_SIZE(sizedata);
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return (0);
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}
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int
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pci_mem_find(pc, pcitag, reg, membasep, memsizep, cacheablep)
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pci_chipset_tag_t pc;
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pcitag_t pcitag;
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int reg;
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bus_mem_addr_t *membasep;
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bus_mem_size_t *memsizep;
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int *cacheablep;
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{
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pcireg_t addrdata, sizedata;
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int s;
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if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
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panic("pci_find_mem: bad request");
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/*
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* Section 6.2.5.1, `Address Maps', tells us that:
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*
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* 1) The builtin software should have already mapped the device in a
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* reasonable way.
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*
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* 2) A device which wants 2^n bytes of memory will hardwire the bottom
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* n bits of the address to 0. As recommended, we write all 1s and see
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* what we get back.
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*/
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addrdata = pci_conf_read(pc, pcitag, reg);
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s = splhigh();
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pci_conf_write(pc, pcitag, reg, 0xffffffff);
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sizedata = pci_conf_read(pc, pcitag, reg);
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pci_conf_write(pc, pcitag, reg, addrdata);
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splx(s);
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if (PCI_MAPREG_TYPE(addrdata) == PCI_MAPREG_TYPE_IO)
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panic("pci_find_mem: I/O region");
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switch (PCI_MAPREG_MEM_TYPE(addrdata)) {
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case PCI_MAPREG_MEM_TYPE_32BIT:
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case PCI_MAPREG_MEM_TYPE_32BIT_1M:
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break;
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case PCI_MAPREG_MEM_TYPE_64BIT:
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/* XXX */ printf("pci_find_mem: 64-bit region\n");
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/* XXX */ return (1);
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default:
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printf("pci_find_mem: reserved region type\n");
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return (1);
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}
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if (membasep != NULL)
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*membasep = PCI_MAPREG_MEM_ADDR(addrdata); /* PCI addr */
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if (memsizep != NULL)
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*memsizep = PCI_MAPREG_MEM_SIZE(sizedata);
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if (cacheablep != NULL)
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*cacheablep = PCI_MAPREG_MEM_CACHEABLE(addrdata);
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return 0;
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}
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