515 lines
13 KiB
C
515 lines
13 KiB
C
/* $NetBSD: pioc.c,v 1.1 1997/10/14 19:57:42 mark Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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* Copyright (c) 1997 Causality Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Peripheral I/O controller - wd, fd, com, lpt Combo chip
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*
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* Parent device for combo chip I/O drivers
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* Currently supports the SMC FDC37GT66[56] controllers.
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*/
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/*#define PIOC_DEBUG*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <arm32/mainbus/mainbus.h>
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#include <arm32/mainbus/piocreg.h>
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#include <arm32/mainbus/piocvar.h>
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#include "locators.h"
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/*
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* PIOC device.
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*
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* This probes and attaches the top level pioc device.
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* It then configures any children of the pioc device.
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*/
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/*
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* pioc softc structure.
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*
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* Contains the device node, bus space tag, handle and address along with
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* other global information such as id and config registers.
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*/
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struct pioc_softc {
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struct device sc_dev; /* device node */
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bus_space_tag_t sc_iot; /* bus tag */
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bus_space_handle_t sc_ioh; /* bus handle */
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bus_addr_t sc_iobase; /* IO base address */
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int sc_id; /* chip ID */
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int sc_config[PIOC_CM_REGS];/* config regs */
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};
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/*
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* The pioc device is a parent to the com device.
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* This means that it needs to provide a bus space tag for
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* a serial console.
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*
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* XXX - This is not fully tested yet.
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*/
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extern struct bus_space mainbus_bs_tag;
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bus_space_tag_t comconstag = &mainbus_bs_tag;
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/* Prototypes for functions */
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static int piocmatch __P((struct device *, struct cfdata *, void *));
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static void piocattach __P((struct device *, struct device *, void *));
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static int piocprint __P((void *aux, const char *name));
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static int piocsearch __P((struct device *, struct cfdata *, void *));
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static int piocsubmatch __P((struct device *, struct cfdata *, void *));
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static void piocgetid __P((bus_space_tag_t iot, bus_space_handle_t ioh,
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int config_entry, int *id, int *revision));
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/* device attach and driver structure */
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struct cfattach pioc_ca = {
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sizeof(struct pioc_softc), piocmatch, piocattach
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};
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struct cfdriver pioc_cd = {
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NULL, "pioc", DV_DULL, 0
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};
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/*
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* void piocgetid(bus_space_tag_t iot, bus_space_handle_t ioh,
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* int config_entry, int *id, int *revision)
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*
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* Enter config mode and return the id and revision
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*/
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static void
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piocgetid(iot, ioh, config_entry, id, revision)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int config_entry;
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int *id;
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int *revision;
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{
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/*
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* Put the chip info configuration mode and read the ID and revision
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*/
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, config_entry);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, config_entry);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_CRD);
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*id = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_CRE);
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*revision = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_EXIT);
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}
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/*
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* int piocmatch(struct device *parent, struct cfdata *cf, void *aux)
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*
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* Put the controller into config mode and probe the ID to see if
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* we recognise it.
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*
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* XXX - INTRUSIVE PROBE
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*/
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static int
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piocmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mainbus_attach_args *mb = aux;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int id, rev;
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int rv = 1;
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/* We need a base address */
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if (mb->mb_iobase == MAINBUSCF_BASE_DEFAULT)
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return(0);
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iot = mb->mb_iot;
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if (bus_space_map(iot, mb->mb_iobase, PIOC_SIZE, 0, &ioh))
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return(0);
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mb->mb_iosize = PIOC_SIZE;
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piocgetid(iot, ioh, PIOC_CM_ENTER_665, &id, &rev);
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if (id == PIOC_CM_ID_665)
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goto out;
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piocgetid(iot, ioh, PIOC_CM_ENTER_666, &id, &rev);
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if (id == PIOC_CM_ID_666)
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goto out;
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rv = 0;
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out:
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bus_space_unmap(iot, ioh, PIOC_SIZE);
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return(rv);
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}
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/*
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* int piocprint(void *aux, const char *name)
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*
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* print routine used during child configuration
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*/
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static int
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piocprint(aux, name)
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void *aux;
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const char *name;
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{
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struct pioc_attach_args *pa = aux;
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if (!name) {
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if (pa->pa_offset)
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printf(" offset 0x%x", pa->pa_offset >> 2);
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if (pa->pa_iosize > 1)
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printf("-0x%x", ((pa->pa_offset + pa->pa_iosize) >> 2) - 1);
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if (pa->pa_irq != -1)
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printf(" irq %d", pa->pa_irq);
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if (pa->pa_drq != -1)
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printf(" drq 0x%08x", pa->pa_drq);
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}
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/* XXX print flags */
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return (QUIET);
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}
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#if 0
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/*
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* int piocsearch(struct device *parent, struct cfdata *cf, void *aux)
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*
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* search function used to probe and attach the child devices.
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*
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* Note: since the offsets of the devices need to be specified in the
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* config file we ignore the FSTAT_STAR.
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*/
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static int
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piocsearch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pioc_softc *sc = (struct pioc_softc *)parent;
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struct pioc_attach_args pa;
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int tryagain;
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do {
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pa.pa_name = NULL;
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = sc->sc_iot;
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if (cf->cf_loc[PIOCCF_OFFSET] == PIOCCF_OFFSET_DEFAULT) {
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pa.pa_offset = PIOCCF_OFFSET_DEFAULT;
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pa.pa_drq = PIOCCF_DACK_DEFAULT;
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pa.pa_irq = PIOCCF_IRQ_DEFAULT;
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} else {
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pa.pa_offset = (cf->cf_loc[PIOCCF_OFFSET] << 2);
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pa.pa_drq = cf->cf_loc[PIOCCF_DACK];
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pa.pa_irq = cf->cf_loc[PIOCCF_IRQ];
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}
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tryagain = 0;
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if ((*cf->cf_attach->ca_match)(parent, cf, &pa) > 0) {
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config_attach(parent, cf, &pa, piocprint);
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/* tryagain = (cf->cf_fstate == FSTATE_STAR);*/
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}
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} while (tryagain);
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return (0);
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}
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#endif
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/*
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* int piocsubmatch(struct device *parent, struct cfdata *cf, void *aux)
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*
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* search function used to probe and attach the child devices.
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*
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* Note: since the offsets of the devices need to be specified in the
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* config file we ignore the FSTAT_STAR.
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*/
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static int
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piocsubmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pioc_softc *sc = (struct pioc_softc *)parent;
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struct pioc_attach_args *pa = aux;
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int tryagain;
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if ((pa->pa_offset >> 2) != cf->cf_loc[0])
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return(0);
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do {
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if (pa->pa_drq == -1)
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pa->pa_drq = cf->cf_loc[1];
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if (pa->pa_irq == -1)
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pa->pa_irq = cf->cf_loc[2];
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tryagain = 0;
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if ((*cf->cf_attach->ca_match)(parent, cf, pa) > 0) {
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config_attach(parent, cf, pa, piocprint);
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/* tryagain = (cf->cf_fstate == FSTATE_STAR);*/
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}
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} while (tryagain);
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return (0);
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}
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/*
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* void piocattach(struct device *parent, struct device *dev, void *aux)
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*
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* Identify the PIOC and read the config registers into the softc.
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* Search and configure all children
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*/
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static void
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piocattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct mainbus_attach_args *mb = aux;
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struct pioc_softc *sc = (struct pioc_softc *)self;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int id, rev;
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int loop;
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struct pioc_attach_args pa;
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sc->sc_iobase = mb->mb_iobase;
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iot = sc->sc_iot = mb->mb_iot;
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if (bus_space_map(iot, sc->sc_iobase, PIOC_SIZE, 0, &ioh))
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panic("%s: couldn't map I/O space", self->dv_xname);
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sc->sc_ioh = ioh;
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piocgetid(iot, ioh, PIOC_CM_ENTER_665, &id, &rev);
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if (id != PIOC_CM_ID_665)
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piocgetid(iot, ioh, PIOC_CM_ENTER_666, &id, &rev);
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printf("\n%s: ", self->dv_xname);
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/* Do we recognise it ? */
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switch (id) {
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case PIOC_CM_ID_665:
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case PIOC_CM_ID_666:
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printf("SMC FDC37C6%xGT peripheral controller rev %d\n", id, rev);
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break;
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default:
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printf("Unrecognised peripheral controller id=%2x rev=%2x\n", id, rev);
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return;
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}
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sc->sc_id = id;
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/*
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* Put the chip info configuration mode and save all the registers
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*/
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switch (id) {
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case PIOC_CM_ID_665:
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_665);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_665);
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break;
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case PIOC_CM_ID_666:
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_666);
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_ENTER_666);
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break;
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}
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for (loop = 0; loop < PIOC_CM_REGS; ++loop) {
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, loop);
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sc->sc_config[loop] = bus_space_read_1(iot, ioh, PIOC_CM_DATA_REG);
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}
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bus_space_write_1(iot, ioh, PIOC_CM_SELECT_REG, PIOC_CM_EXIT);
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#ifdef PIOC_DEBUG
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printf("%s: ", self->dv_xname);
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for (loop = 0; loop < PIOC_CM_REGS; ++loop)
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printf("%02x ", sc->sc_config[loop]);
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printf("\n");
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#endif
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/*
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* Ok as yet we cannot do specific config_found() calls
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* for the children yet. This is because the pioc device does
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* not know the interrupt numbers to use.
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* Eventually this information will have to be provided by the
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* riscpc specific code.
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* Until then just do a config_search() and pick the info up
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* from the cfdata.
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* Note the child devices require some modifications as well.
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*/
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/*
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* Ok Now configure the child devices of the pioc device
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* Use the pioc config registers to determine the addressing
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* of the children
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*/
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/*
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* Start by configuring the IDE controller
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*/
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if (sc->sc_config[PIOC_CM_CR0] & PIOC_WDC_ENABLE) {
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pa.pa_name = "wdc";
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = iot;
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if (sc->sc_config[PIOC_CM_CR5] & PIOC_WDC_SECONDARY)
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pa.pa_offset = (PIOC_WDC_SECONDARY_OFFSET << 2);
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else
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pa.pa_offset = (PIOC_WDC_PRIMARY_OFFSET << 2);
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pa.pa_drq = -1;
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pa.pa_irq = -1;
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config_found_sm(self, &pa, piocprint, piocsubmatch);
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}
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/*
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* Next configure the floppy controller
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*/
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if (sc->sc_config[PIOC_CM_CR0] & PIOC_FDC_ENABLE) {
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pa.pa_name = "fdc";
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = iot;
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if (sc->sc_config[PIOC_CM_CR5] & PIOC_FDC_SECONDARY)
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pa.pa_offset = (PIOC_FDC_SECONDARY_OFFSET << 2);
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else
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pa.pa_offset = (PIOC_FDC_PRIMARY_OFFSET << 2);
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pa.pa_drq = -1;
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pa.pa_irq = -1;
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config_found_sm(self, &pa, piocprint, piocsubmatch);
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}
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/*
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* Next configure the serial ports
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*/
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/*
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* XXX - There is a deficiency in the serial configuration
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* If the PIOC has the serial ports configured for COM3 and COM4
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* the standard COM3 and COM4 addresses are assumed rather than
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* examining CR1 to determine the COM3 and COM4 addresses.
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*/
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if (sc->sc_config[PIOC_CM_CR2] & PIOC_UART1_ENABLE) {
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pa.pa_name = "com";
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = iot;
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switch (sc->sc_config[PIOC_CM_CR2] & PIOC_UART1_ADDR_MASK) {
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case PIOC_UART1_ADDR_COM1:
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pa.pa_offset = (PIOC_COM1_OFFSET << 2);
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break;
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case PIOC_UART1_ADDR_COM2:
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pa.pa_offset = (PIOC_COM2_OFFSET << 2);
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break;
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case PIOC_UART1_ADDR_COM3:
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pa.pa_offset = (PIOC_COM3_OFFSET << 2);
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break;
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case PIOC_UART1_ADDR_COM4:
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pa.pa_offset = (PIOC_COM4_OFFSET << 2);
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break;
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}
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pa.pa_drq = -1;
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pa.pa_irq = -1;
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config_found_sm(self, &pa, piocprint, piocsubmatch);
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}
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if (sc->sc_config[PIOC_CM_CR2] & PIOC_UART2_ENABLE) {
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pa.pa_name = "com";
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = iot;
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switch (sc->sc_config[PIOC_CM_CR2] & PIOC_UART2_ADDR_MASK) {
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case PIOC_UART2_ADDR_COM1:
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pa.pa_offset = (PIOC_COM1_OFFSET << 2);
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break;
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case PIOC_UART2_ADDR_COM2:
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pa.pa_offset = (PIOC_COM2_OFFSET << 2);
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break;
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case PIOC_UART2_ADDR_COM3:
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pa.pa_offset = (PIOC_COM3_OFFSET << 2);
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break;
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case PIOC_UART2_ADDR_COM4:
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pa.pa_offset = (PIOC_COM4_OFFSET << 2);
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break;
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}
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pa.pa_drq = -1;
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pa.pa_irq = -1;
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config_found_sm(self, &pa, piocprint, piocsubmatch);
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}
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/*
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* Next configure the printer port
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*/
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if ((sc->sc_config[PIOC_CM_CR1] & PIOC_LPT_ADDR_MASK) != PIOC_LPT_ADDR_DISABLE) {
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pa.pa_name = "lpt";
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pa.pa_iobase = sc->sc_iobase;
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pa.pa_iosize = 0;
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pa.pa_iot = iot;
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switch (sc->sc_config[PIOC_CM_CR1] & PIOC_LPT_ADDR_MASK) {
|
|
case PIOC_LPT_ADDR_1:
|
|
pa.pa_offset = (PIOC_LPT1_OFFSET << 2);
|
|
break;
|
|
case PIOC_LPT_ADDR_2:
|
|
pa.pa_offset = (PIOC_LPT2_OFFSET << 2);
|
|
break;
|
|
case PIOC_LPT_ADDR_3:
|
|
pa.pa_offset = (PIOC_LPT3_OFFSET << 2);
|
|
break;
|
|
}
|
|
pa.pa_drq = -1;
|
|
pa.pa_irq = -1;
|
|
config_found_sm(self, &pa, piocprint, piocsubmatch);
|
|
}
|
|
|
|
#if 0
|
|
config_search(piocsearch, self, NULL);
|
|
#endif
|
|
}
|
|
|
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/* End of pioc.c */
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