75 lines
3.1 KiB
C
75 lines
3.1 KiB
C
/* $NetBSD: tiotgreg.h,v 1.1 2014/07/16 18:27:19 bouyer Exp $ */
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/*
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* Copyright (c) 2013 Manuel Bouyer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#define TI_OTG_NPORTS 2
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/* USBSS registers */
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#define TIOTG_USBSS_OFFSET 0
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#define TIOTG_USBSS_READ4(sc, reg) \
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg) + TIOTG_USBSS_OFFSET)
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#define TIOTG_USBSS_WRITE4(sc, reg, val) \
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg) + TIOTG_USBSS_OFFSET, (val))
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#define USBSS_REVREG 0x00
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#define USBSS_SYSCONFIG 0x10
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#define USBSS_SYSCONFIG_USB0_OCP_EN_N 0x800
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#define USBSS_SYSCONFIG_PHY0_UTMI_EN_N 0x400
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#define USBSS_SYSCONFIG_USB1_OCP_EN_N 0x200
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#define USBSS_SYSCONFIG_PHY1_UTMI_EN_N 0x100
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#define USBSS_SYSCONFIG_STBYMODE_SHIFT 4
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#define USBSS_SYSCONFIG_IDLEMODE_SHIFT 2
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#define USBSS_SYSCONFIG_FREEEMU 0x002
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#define USBSS_SYSCONFIG_SRESET 0x001
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/* USB control registers */
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#define USB_CTRL_OFFSET(port) (0x1000 + (0x800 * (port)))
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#define USB_PORT_SIZE 0x800 /* size of CTRL+PHY+CORE */
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#define TIOTG_USBC_READ4(sc, reg) \
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bus_space_read_4(sc->sc_ctrliot, sc->sc_ctrlioh, (reg))
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#define TIOTG_USBC_WRITE4(sc, reg, val) \
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bus_space_write_4(sc->sc_ctrliot, sc->sc_ctrlioh, (reg), (val))
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#define USBCTRL_REV 0x00
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#define USBCTRL_CTRL 0x14
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#define USBCTRL_STAT 0x18
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#define USBCTRL_IRQ_STAT0 0x30
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#define USBCTRL_IRQ_STAT0_RXSHIFT 16
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#define USBCTRL_IRQ_STAT0_TXSHIFT 0
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#define USBCTRL_IRQ_STAT1 0x34
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#define USBCTRL_IRQ_STAT1_DRVVBUS (1 << 8)
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#define USBCTRL_INTEN_SET0 0x38
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#define USBCTRL_INTEN_SET1 0x3C
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#define USBCTRL_INTEN_USB_ALL 0x1ff
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#define USBCTRL_INTEN_USB_SOF (1 << 3)
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#define USBCTRL_INTEN_CLR0 0x40
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#define USBCTRL_INTEN_CLR1 0x44
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#define USBCTRL_UTMI 0xE0
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#define USBCTRL_UTMI_FSDATAEXT (1 << 1)
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#define USBCTRL_MODE 0xE8
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#define USBCTRL_MODE_IDDIG (1 << 8)
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#define USBCTRL_MODE_IDDIGMUX (1 << 7)
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#define USB_CORE_OFFSET 0x400
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#define USB_CORE_SIZE 0x400
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