76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
#ifndef _ARM_OMAP_OMAP_GPTMRREG_H_
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#define _ARM_OMAP_OMAP_GPTMRREG_H_
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/* Registers */
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#define TIDR 0x00
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#define TIOCP_CFG 0x10
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#define TISTAT 0x14
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#define TISR 0x18
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#define TIER 0x1C
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#define TWER 0x20
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#define TCLR 0x24
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#define TCRR 0x28
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#define TLDR 0x2C
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#define TTGR 0x30
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#define TWPS 0x34
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#define TMAR 0x38
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#define TCAR 0x3C
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#define TSICR 0x40
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#define TIDR_TID_REV_MASK 0xF
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#define TIOCP_CFG_AUTOIDLE (1<<0)
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#define TIOCP_CFG_SOFTRESET (1<<1)
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#define TIOCP_CFG_ENAWAKEUP (1<<2)
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#define TIOCP_CFG_IDLEMODE_MASK (3<<3)
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#define TIOCP_CFG_IDLEMODE(n) (((n)&0x3)<<3)
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#define TIOCP_CFG_EMUFREE (1<<5)
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#define TISTAT_RESETDONE (1<<0)
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#define TISR_MAT_IT_FLAG (1<<0)
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#define TISR_OVF_IT_FLAG (1<<1)
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#define TISR_TCAR_IT_FLAG (1<<2)
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#define TIER_MAT_IT_ENA (1<<0)
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#define TIER_OVF_IT_ENA (1<<1)
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#define TIER_TCAR_IT_ENA (1<<2)
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#define TWER_MAT_WUP_ENA (1<<0)
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#define TWER_OVF_WUP_ENA (1<<2)
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#define TWER_TCAR_WUP_ENA (1<<3)
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#define TCLR_ST (1<<0)
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#define TCLR_AR (1<<1)
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#define TCLR_PTV_MASK (7<<2)
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#define TCLR_PTV(n) ((n)<<2)
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#define TCLR_PRE(n) ((n)<<5)
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#define TCLR_CE (1<<6)
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#define TCLR_SCPWM (1<<7)
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#define TCLR_TCM(n) ((n)<<8)
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#define TCLR_TCM_MASK (3<<8)
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#define TCLR_TRG(n) ((n)<<10)
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#define TCLR_TRG_MASK (3<<10)
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#define TCLR_PT (1<<12)
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#define TCLR_TCM_NONE 0
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#define TCLR_TCM_RISING 1
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#define TCLR_TCM_FALLING 2
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#define TCLR_TCM_BOTH 3
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#define TCLR_TRG_NONE 0
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#define TCLR_TRG_OVERFLOW 1
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#define TCLR_TRG_OVERFLOW_AND_MATCH 2
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#define TWPS_W_PEND__TCLR (1<<0)
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#define TWPS_W_PEND__TCRR (1<<1)
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#define TWPS_W_PEND__TLDR (1<<2)
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#define TWPS_W_PEND__TTGR (1<<3)
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#define TWPS_W_PEND__TMAR (1<<4)
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#define TSICR_POSTED (1<<2)
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#define TSICR_SFT (1<<1)
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#endif
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