326 lines
11 KiB
C
326 lines
11 KiB
C
/* $NetBSD: obio_mputmr.c,v 1.8 2013/06/16 17:47:54 matt Exp $ */
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/*
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* Based on omap_mputmr.c
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* Based on i80321_timer.c and arch/arm/sa11x0/sa11x0_ost.c
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*
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* Copyright (c) 1997 Mark Brinicombe.
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* Copyright (c) 1997 Causality Limited.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro and Ichiro FUKUHARA.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Microsoft
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: obio_mputmr.c,v 1.8 2013/06/16 17:47:54 matt Exp $");
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#include "opt_omap.h"
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#include "opt_cpuoptions.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/time.h>
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#include <sys/device.h>
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#include <dev/clock_subr.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <arm/omap/omap2_obiovar.h>
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#include <arm/omap/omap2_mputmrvar.h>
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#if defined(OMAP_2430) || defined(OMAP_2420)
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#include <arm/omap/omap2_mputmrreg.h>
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#endif
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#include <arm/omap/omap2_reg.h>
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typedef struct {
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uint gptn;
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bus_addr_t addr;
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uint intr;
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uint32_t clksel2;
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uint32_t fclken1;
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uint32_t iclken1;
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} gptimer_instance_t;
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/* XXX
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* this table can be used to initialize the GP Timers
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* until we use config(8) locators for CLKSEL2 values, you may want to edit here.
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*/
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#define GPT_ENTRY(n) { \
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.gptn = (n), \
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.addr = GPT ## n ## _BASE, \
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.intr = IRQ_ ## GPT ## n, \
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.clksel2 = OMAP2_CM_CLKSEL2_CORE_GPTn(n, \
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CLKSEL2_CORE_GPT_SYS_CLK), \
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.fclken1 = OMAP2_CM_FCLKEN1_CORE_EN_GPT ## n, \
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.iclken1 = OMAP2_CM_ICLKEN1_CORE_EN_GPT ## n, \
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}
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static const gptimer_instance_t gptimer_instance_tab[] = {
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GPT_ENTRY( 2), GPT_ENTRY( 3), GPT_ENTRY( 4), GPT_ENTRY( 5),
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GPT_ENTRY( 6), GPT_ENTRY( 7), GPT_ENTRY( 8), GPT_ENTRY( 9),
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GPT_ENTRY(10), GPT_ENTRY(11),
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#ifdef GPT12_BASE
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GPT_ENTRY(12),
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#endif
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};
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#undef GPT_ENTRY
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static const gptimer_instance_t *
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gpt_lookup(struct obio_attach_args *);
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static void gpt_enable(struct mputmr_softc *,
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struct obio_attach_args *, const gptimer_instance_t *);
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static int obiomputmr_match(device_t, struct cfdata *, void *);
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static void obiomputmr_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(obiomputmr, sizeof(struct mputmr_softc),
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obiomputmr_match, obiomputmr_attach, NULL, NULL);
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static int
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obiomputmr_match(device_t parent, cfdata_t match, void *aux)
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{
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struct obio_attach_args *obio = aux;
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if (obio->obio_addr == -1 || obio->obio_intr == -1)
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panic("omapmputmr must have addr and intr specified in config.");
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if (obio->obio_size == 0)
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obio->obio_size = 256; /* Per the OMAP TRM. */
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if (gpt_lookup(obio) != NULL) {
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/* We implicitly trust the config file. */
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return 1;
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}
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KASSERT(obio->obio_addr != GPT2_BASE);
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return 0;
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}
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void
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obiomputmr_attach(device_t parent, device_t self, void *aux)
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{
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struct mputmr_softc *sc = device_private(self);
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struct obio_attach_args *obio = aux;
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int ints_per_sec;
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sc->sc_dev = self;
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sc->sc_iot = obio->obio_iot;
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sc->sc_intr = obio->obio_intr;
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if (bus_space_map(obio->obio_iot, obio->obio_addr, obio->obio_size, 0,
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&sc->sc_ioh))
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panic("%s: Cannot map registers", device_xname(self));
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switch (device_unit(self)) { /* XXX broken */
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case 0:
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clock_sc = sc;
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ints_per_sec = hz;
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break;
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case 1:
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stat_sc = sc;
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ints_per_sec = profhz = stathz = STATHZ;
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break;
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case 2:
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ref_sc = sc;
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ints_per_sec = hz; /* Same rate as clock */
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break;
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default:
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ints_per_sec = hz; /* Better value? */
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break;
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}
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aprint_normal(": OMAP MPU Timer");
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gpt_enable(sc, obio, gpt_lookup(obio));
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aprint_normal("\n");
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aprint_naive("\n");
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#if defined(OMAP_2430) || defined(OMAP_2420)
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/* Stop the timer from counting, but keep the timer module working. */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, MPU_CNTL_TIMER,
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MPU_CLOCK_ENABLE);
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#endif
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timer_factors tf;
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calc_timer_factors(ints_per_sec, &tf);
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switch (device_unit(self)) { /* XXX broken */
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case 0:
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#ifndef ARM11_PMC
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counts_per_hz = tf.reload + 1;
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counts_per_usec = tf.counts_per_usec;
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#endif
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break;
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case 2:
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/*
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* The microtime reference clock for all practical purposes
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* just wraps around as an unsigned int.
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*/
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tf.reload = 0xffffffff;
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break;
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default:
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break;
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}
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#if defined(OMAP_2430) || defined(OMAP_2420)
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/* Set the reload value. */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, MPU_LOAD_TIMER, tf.reload);
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/* Set the PTV and the other required bits and pieces. */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, MPU_CNTL_TIMER,
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( MPU_CLOCK_ENABLE
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| (tf.ptv << MPU_PTV_SHIFT)
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| MPU_AR
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| MPU_ST));
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/* The clock is now running, but is not generating interrupts. */
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#endif
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}
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static const gptimer_instance_t *
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gpt_lookup(struct obio_attach_args *obio)
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{
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const gptimer_instance_t *ip;
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uint i;
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for (i = 0, ip = gptimer_instance_tab;
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i < __arraycount(gptimer_instance_tab);
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i++, ip++) {
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if (ip->addr == obio->obio_addr && ip->intr == obio->obio_intr)
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return ip;
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}
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return NULL;
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}
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void
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gpt_enable(
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struct mputmr_softc *sc,
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struct obio_attach_args *obio,
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const gptimer_instance_t *ip)
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{
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KASSERT(ip != NULL);
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aprint_normal(" #%d", ip->gptn);
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#if defined(OMAP_2430) || defined(OMAP_2420)
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bus_space_handle_t ioh;
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uint32_t r;
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int err = bus_space_map(obio->obio_iot, OMAP2_CM_BASE,
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OMAP2_CM_SIZE, 0, &ioh);
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KASSERT(err == 0);
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r = bus_space_read_4(obio->obio_iot, ioh, OMAP2_CM_CLKSEL2_CORE);
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r |= ip->clksel2;
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bus_space_write_4(obio->obio_iot, ioh, OMAP2_CM_CLKSEL2_CORE, r);
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r = bus_space_read_4(obio->obio_iot, ioh, OMAP2_CM_FCLKEN1_CORE);
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r |= ip->fclken1;
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bus_space_write_4(obio->obio_iot, ioh, OMAP2_CM_FCLKEN1_CORE, r);
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r = bus_space_read_4(obio->obio_iot, ioh, OMAP2_CM_ICLKEN1_CORE);
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r |= ip->iclken1;
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bus_space_write_4(obio->obio_iot, ioh, OMAP2_CM_ICLKEN1_CORE, r);
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bus_space_unmap(obio->obio_iot, ioh, OMAP2_CM_SIZE);
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#endif
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}
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