78 lines
2.0 KiB
Plaintext
78 lines
2.0 KiB
Plaintext
# $NetBSD: files.imx31,v 1.7 2011/03/11 03:16:13 bsh Exp $
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#
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# Configuration info for the Freescale i.MX31
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#
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defparam opt_imx.h MEMSIZE
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defflag opt_imx.h IMX51
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define bus_dma_generic
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file arch/arm/imx/imx_space.c
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file arch/arm/imx/imx_dma.c bus_dma_generic
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# iMX L2 Cache Controller
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device l2cc
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attach l2cc at mainbus
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file arch/arm/imx/imx31_l2cc.c l2cc
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# iMX AHB
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device ahb { [addr=-1], [size=0], [intr=-1], [irqbase=-1]} : bus_space_generic
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attach ahb at mainbus
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file arch/arm/imx/imx31_ahb.c ahb
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# iMX AdVanced Interrupt Controller
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include "arch/arm/pic/files.pic"
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device avic: pic, pic_splfuncs
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attach avic at ahb
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file arch/arm/imx/imx31_icu.c avic needs-flag
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file arch/arm/arm32/irq_dispatch.S
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# iMX IP bus
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device aips { [addr=-1], [size=0], [intr=-1]} : bus_space_generic
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attach aips at ahb
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file arch/arm/imx/imx31_aips.c aips
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# iMX EMI (external memory interface)
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device emi { [offset=-1], [size=0], [intr=-1] } : bus_space_generic
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attach emi at ahb
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file arch/arm/imx/imx31_emi.c emi
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# iMX GPIO
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device imxgpio: gpiobus
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attach imxgpio at ahb
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file arch/arm/imx/imx31_gpio.c imxgpio needs-flag
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# iMX M3IF - Multi Master Memory Interface
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# iMX ESDCTL/MDDRC - Enhanced SDRAM/LPDDR memory controller
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# iMX PCMCIA - PCMCIA memory controller
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# iMX NANDFC - NAND Flash memory controller
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# iMX WEIM - Wireless External Interface Module
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# iMX clock
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file arch/arm/imx/imxclock.c
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file arch/arm/imx/imx31_clock.c
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# Clock Control Module
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device imxccm
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attach imxccm at aips
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file arch/arm/imx/imx31_ccm.c imxccm needs-flag
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defparam opt_imx31clk.h IMX31_IPGCLK_FREQ
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# iMX UART
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device imxuart
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attach imxuart at aips
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file arch/arm/imx/imxuart.c imxuart needs-flag
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file arch/arm/imx/imx31_uart.c imxuart
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defflag opt_imxuart.h IMXUARTCONSOLE
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attach ehci at ahb with ehci_ahb : bus_dma_generic
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file arch/arm/imx/echi_ahb.c ehci_ahb
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attach ohci at ahb with ohci_ahb : bus_dma_generic
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file arch/arm/imx/ochi_ahb.c ohci_ahb
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attach wdc at ahb with wdc_ahb : bus_dma_generic
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file arch/arm/imx/wdc_ahb.c wdc_ahb
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