144 lines
5.6 KiB
C
144 lines
5.6 KiB
C
/* $NetBSD: isa_machdep.h,v 1.13 2006/06/12 15:39:01 tsutsui Exp $ */
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/* $OpenBSD: isa_machdep.h,v 1.5 1997/04/19 17:20:00 pefo Exp $ */
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/*
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* Copyright (c) 1996 Per Fogelstrom
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Per Fogelstrom
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ISA_MACHDEP_H_
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#define _ISA_MACHDEP_H_
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#include <dev/isa/isadmavar.h>
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typedef struct arc_isa_bus *isa_chipset_tag_t;
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/*
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* I/O macros to access isa bus ports/memory.
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* At the first glance theese macros may seem inefficient.
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* However, the CPU executes an instruction every 7.5ns
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* so the bus is much slower so it doesn't matter, really.
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*/
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#define isa_outb(x,y) outb(arc_bus_io.bs_vbase + (x)- arc_bus_io.bs_start, y)
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#define isa_inb(x) inb(arc_bus_io.bs_vbase + (x) - arc_bus_io.bs_start)
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struct arc_isa_bus {
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void *ic_data;
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struct isa_dma_state ic_dmastate;
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void (*ic_attach_hook)(struct device *, struct device *,
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struct isabus_attach_args *);
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const struct evcnt *(*ic_intr_evcnt)(isa_chipset_tag_t, int);
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void *(*ic_intr_establish)(isa_chipset_tag_t, int, int, int,
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int (*)(void *), void *);
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void (*ic_intr_disestablish)(isa_chipset_tag_t, void *);
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};
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/*
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* Functions provided to machine-independent ISA code.
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*/
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#define isa_attach_hook(p, s, a) /* \
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(*(a)->iba_ic->ic_attach_hook)((p), (s), (a)) */
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#define isa_intr_evcnt(c, i) \
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(*(c)->ic_intr_evcnt)((c)->ic_data, (i))
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#define isa_intr_establish(c, i, t, l, f, a) \
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(*(c)->ic_intr_establish)((c)->ic_data, (i), (t), (l), (f), (a))
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#define isa_intr_disestablish(c, h) \
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(*(c)->ic_intr_disestablish)((c)->ic_data, (h))
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#define isa_dmainit(ic, bst, dmat, d) \
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_isa_dmainit(&(ic)->ic_dmastate, (bst), (dmat), (d))
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#define isa_dmacascade(ic, c) \
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_isa_dmacascade(&(ic)->ic_dmastate, (c))
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#define isa_dmamaxsize(ic, c) \
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_isa_dmamaxsize(&(ic)->ic_dmastate, (c))
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#define isa_dmamap_create(ic, c, s, f) \
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_isa_dmamap_create(&(ic)->ic_dmastate, (c), (s), (f))
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#define isa_dmamap_destroy(ic, c) \
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_isa_dmamap_destroy(&(ic)->ic_dmastate, (c))
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#define isa_dmastart(ic, c, a, n, p, f, bf) \
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_isa_dmastart(&(ic)->ic_dmastate, (c), (a), (n), (p), (f), (bf))
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#define isa_dmaabort(ic, c) \
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_isa_dmaabort(&(ic)->ic_dmastate, (c))
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#define isa_dmacount(ic, c) \
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_isa_dmacount(&(ic)->ic_dmastate, (c))
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#define isa_dmafinished(ic, c) \
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_isa_dmafinished(&(ic)->ic_dmastate, (c))
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#define isa_dmadone(ic, c) \
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_isa_dmadone(&(ic)->ic_dmastate, (c))
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#define isa_dmafreeze(ic) \
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_isa_dmafreeze(&(ic)->ic_dmastate)
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#define isa_dmathaw(ic) \
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_isa_dmathaw(&(ic)->ic_dmastate)
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#define isa_dmamem_alloc(ic, c, s, ap, f) \
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_isa_dmamem_alloc(&(ic)->ic_dmastate, (c), (s), (ap), (f))
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#define isa_dmamem_free(ic, c, a, s) \
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_isa_dmamem_free(&(ic)->ic_dmastate, (c), (a), (s))
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#define isa_dmamem_map(ic, c, a, s, kp, f) \
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_isa_dmamem_map(&(ic)->ic_dmastate, (c), (a), (s), (kp), (f))
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#define isa_dmamem_unmap(ic, c, k, s) \
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_isa_dmamem_unmap(&(ic)->ic_dmastate, (c), (k), (s))
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#define isa_dmamem_mmap(ic, c, a, s, o, p, f) \
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_isa_dmamem_mmap(&(ic)->ic_dmastate, (c), (a), (s), (o), (p), (f))
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#define isa_drq_alloc(ic, c) \
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_isa_drq_alloc(&(ic)->ic_dmastate, c)
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#define isa_drq_free(ic, c) \
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_isa_drq_free(&(ic)->ic_dmastate, c)
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#define isa_drq_isfree(ic, c) \
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_isa_drq_isfree(&(ic)->ic_dmastate, (c))
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#define isa_malloc(ic, c, s, p, f) \
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_isa_malloc(&(ic)->ic_dmastate, (c), (s), (p), (f))
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#define isa_free(a, p) \
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_isa_free((a), (p))
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#define isa_mappage(m, o, p) \
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_isa_mappage((m), (o), (p))
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int isa_intr_alloc(isa_chipset_tag_t, int, int, int *);
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void sysbeepstop(void *);
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void sysbeep(int, int);
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/*
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* Interrupt control struct used to control the ICU setup.
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*/
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struct isa_intrhand {
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struct isa_intrhand *ih_next;
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int (*ih_fun)(void *);
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void *ih_arg;
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u_long ih_count;
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int ih_level;
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int ih_irq;
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struct evcnt ih_evcnt;
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char ih_evname[32];
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};
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#endif /* _ISA_MACHDEP_H_ */
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