90 lines
3.0 KiB
C
90 lines
3.0 KiB
C
/* $NetBSD: smscvar.h,v 1.5 2012/10/27 17:18:25 chs Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Bill Squier.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_SMSC47B397VAR_H_
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#define _DEV_SMSC47B397VAR_H_
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/*
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* SMSC LPC47B397-NC "super-io" chip
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*/
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#define SMSC_ADDR 0
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#define SMSC_DATA 1
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/* Chip control registers */
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#define SMSC_LOGICAL_DEV_SEL 0x07 /* Selector for logical device */
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#define SMSC_DEVICE_ID 0x20 /* Device ID register */
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#define SMSC_DEVICE_REVISION 0x21 /* Device revision */
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#define SMSC_IO_BASE_MSB 0x60
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#define SMSC_IO_BASE_LSB 0x61
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#define SMSC_LOGICAL_DEVICE 0x08 /* Magic number to select monitoring
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functions. */
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#define SMSC_CONFIG_START 0x55 /* Start configuration mode */
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#define SMSC_CONFIG_END 0xAA /* End configuration mode */
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#define SMSC_ID_47B397 0x6F /* Chip ID */
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#define SMSC_ID_SCH5307NS 0x81
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#define SMSC_ID_SCH5317 0x85
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/* Data registers */
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#define SMSC_TEMP1 0x25
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#define SMSC_TEMP2 0x26
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#define SMSC_TEMP3 0x27
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#define SMSC_TEMP4 0x80
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/* NOTE: Reading the Fan LSB locks the Fan MSB. The LSB Must be read first. */
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#define SMSC_FAN1_LSB 0x28
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#define SMSC_FAN1_MSB 0x29
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#define SMSC_FAN2_LSB 0x2A
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#define SMSC_FAN2_MSB 0x2B
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#define SMSC_FAN3_LSB 0x2C
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#define SMSC_FAN3_MSB 0x2D
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#define SMSC_FAN4_LSB 0x2E
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#define SMSC_FAN4_MSB 0x2F
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#define SMSC_MAX_SENSORS 8 /* 4 temp sensors, 4 fan sensors */
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struct smsc_softc {
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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int sc_flags;
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struct sysmon_envsys *sc_sme;
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envsys_data_t sc_sensor[SMSC_MAX_SENSORS];
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uint8_t sc_regs[SMSC_MAX_SENSORS];
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};
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#endif /* _DEV_SMSC47B397VAR_H_ */
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